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Technical Committee on Computer Systems (CPSY) (Searched in: 2011)
Search Results: Keywords 'from:2012-03-02 to:2012-03-02'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-02 15:15 |
Miyagi | Profiling-based Source to Source Compiler for GPGPU Atsushi Yumoto, Nobuhiko Sugino (Titech)  CPSY2011-83 DC2011-87 |
A new profiling-based C to CUDA compiler for GPCPU is proposed in order to help developing higher performance GPGPU appl... [more] | CPSY2011-83 DC2011-87 pp.79-84 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-02 15:45 |
Miyagi | Design and implementation of distributed TLB mechanism for heterogeneous multi-core processors Daiki Kawase, Kazutoshi Suito, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.) CPSY2011-84 DC2011-88 |
Heterogeneous multi-core architecture, in which processor cores, memory modules, and I/O modules with various sizes, fu... [more] |
CPSY2011-84 DC2011-88 pp.85-90 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-02 16:15 |
Miyagi | Design and implementation of I/O control mechanism for heterogeneous multi-core processors Yuki Kawaguchi, Kazutoshi Suito, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.) CPSY2011-85 DC2011-89 |
Heterogeneous multi-core architecture that consists of processors, memory modules, and I/O devices with various sizes, f... [more] | CPSY2011-85 DC2011-89 pp.91-96 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-02 16:45 |
Miyagi | Multi Core Task Mapping Method by Weight Control for Dependencies between Descendent Tasks Noriaki Suzuki, Takahiro Kumura, Yuichi Nakamura (NEC) CPSY2011-86 DC2011-90 |
In this paper, we propose a task mapping method for AMP multi-core processors. In this method, weights of the dependenci... [more] | CPSY2011-86 DC2011-90 pp.97-102 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 09:00 |
Miyagi | An Implementation and Evaluation of MapReduce Framework with Thread Virtualization Environment for Cell Broadband Engine Clusters Masahiro Yamada, Tetsuya Nakahama (Keio Univ.), Masato Yoshimi (Doshisha Univ.), Hideharu Amano (Keio Univ.) CPSY2011-87 DC2011-91 |
Recently heterogeneous multi-core processors such as Cell Broadband Engine(Cell/B.E.) are introduced into cluster syste... [more] |
CPSY2011-87 DC2011-91 pp.169-174 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 09:30 |
Miyagi | An Implementation and Evaluation of Automatic MPI Expansion tool for Cell/B.E. cluster Tetsuya Nakahama, Masahiro Yamada (Keio Univ.), Masato Yoshimi (Doshisya Univ.), Hideharu Amano (Keio Univ.) CPSY2011-88 DC2011-92 |
The productivity of parallel programming has become a serious problem with the rapid advance of multi-core and many-core... [more] | CPSY2011-88 DC2011-92 pp.175-180 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 10:30 |
Miyagi | Implementation of Embedded Java VM for Multithreaded Processor Yasuhito Ito, Hiroyuki Chishiro, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.) CPSY2011-89 DC2011-93 |
Java system has been widely employed in recent embedded systems due to portability of Java bytecode, high-level security... [more] | CPSY2011-89 DC2011-93 pp.181-186 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 11:00 |
Miyagi | An Automatic Parallelization Scheme Used in JIT Compilation for Dynamic Language Applications Ryotaro Ikeda, Nobuhiko Sugino (Tokyo Tech) CPSY2011-90 DC2011-94 |
An automatic parallelization scheme for dynamic language applications under interpreter ex-ecution environment is propos... [more] | CPSY2011-90 DC2011-94 pp.187-192 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 13:00 |
Miyagi | Development of a FPGA based performance evaluation system for a Ultra-Android prototype Kenji Toda, Osamu Morikawa (AIST), Tomoyuki Morimoto, Michiya Hagimoto, Hiroyuki Uchida, Nobuyuki Hikichi, Yasumori Hibi, Yukoh Matsumoto (Tops Systems) CPSY2011-91 DC2011-95 |
A performance evaluation system for Ultra-Android platform ,which achieves high performance and less energy consuming an... [more] | CPSY2011-91 DC2011-95 pp.193-198 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 13:30 |
Miyagi | A Case Study of Supervisor Processor for Dependable System Makoto Fujino, Yoshihiro Ichinomiya, Hiroki Tanaka, Sayaka Yoshiura, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2011-92 DC2011-96 |
Multicore processor is widely used in various systems. Although it will be used in harsh environment such as in-vehicle... [more] |
CPSY2011-92 DC2011-96 pp.199-204 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 14:00 |
Miyagi | Time Division Method of Detecting Fault of RAM by Software Ryoya Ichioka (Mitsubishi Electric) CPSY2011-93 DC2011-97 |
We're developing about the RAM test for an embedded systems. Traditional RAM test can't be executed with other software ... [more] | CPSY2011-93 DC2011-97 pp.205-209 |
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| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2012-03-03 14:30 |
Miyagi | Structure Search of Cascaded TMR for Pipelined Processors Based on Genetic Algorithm Masayuki Arai, Hajime Ide, Kazuhiko Iwasaki (Tokyo Metro. Univ.) CPSY2011-94 DC2011-98 |
In this paper we discuss on the application of TMR (Triple Modular Redundancy) to every stage of pipelined processors, a... [more] | CPSY2011-94 DC2011-98 pp.211-217 |
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