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| Chair |
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Takashi Aikyo (STARC) |
| Vice Chair |
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Tomohiro Yoneda (NII) |
| Secretary |
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Masato Kitagami (Chiba Univ.), Michinobu Nakao (Renesas) |
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| Conference Date |
Mon, Feb 16, 2009 10:00 - 16:35 |
| Topics |
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| Conference Place |
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Copyright
and
reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Mon, Feb 16 AM
10:00 - 11:15 |
| (1) |
10:00-10:25 |
On the Acceleration of Threshold Test Generation Based on Fault Acceptability  DC2008-68 |
Yusuke Nakashima, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ) |
| (2) |
10:25-10:50 |
A test pattern generation method to reduce the number of detected untestable faults on scan testing DC2008-69 |
Masayoshi Yoshimura (Kyusyu Univ.), Hiroshi Ogawa (Nihon Univ.), Yusyo Omori (Fujitsu Microelectronics), Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meizi Univ.) |
| (3) |
10:50-11:15 |
On the Acceleration of Redundancy Identification for Hard-to-ATPG faults Using SAT DC2008-70 |
Yusuke Akiyama, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyusyu Univ.), Koji Yamazaki (Meiji Univ.) |
| |
11:15-11:30 |
Break ( 15 min. ) |
Mon, Feb 16 AM
11:30 - 12:20 |
| (4) |
11:30-11:55 |
Decimal adder using abacus architecture and its application to residue arithmetic DC2008-71 |
Tadahito Iijima, Shugang Wei (Gunma Univ.) |
| (5) |
11:55-12:20 |
History based scheduling for reliable Volunteer Computing DC2008-72 |
Ryo Fujita, Kan Watanabe, Masaru Fukushi, Susumu Horiguchi (GSIS, Tohoku Univ.) |
| |
12:20-13:50 |
Lunch Break ( 90 min. ) |
Mon, Feb 16 PM
13:50 - 15:05 |
| (6) |
13:50-14:15 |
A method for generating defect oriented test patterns for combinational circuits DC2008-73 |
Hiroshi Takahashi, Yoshinobu Higami, Taisuke Izumi, Takashi Aikyo, Yuzo Takamatsu (Ehime Univ.) |
| (7) |
14:15-14:40 |
On Tests to Detect Open faults with Considering Adjacent Lines DC2008-74 |
Tetsuya Watanabe, Hiroshi Takahashi, Yoshinobu Higami (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ, Tokushima), Yuzo Takamatsu (Ehime Univ.) |
| (8) |
14:40-15:05 |
Note on Small Delay Fault Model for Intra-Gate Resistive Open Defects DC2008-75 |
Masayuki Arai, Akifumi Suto, Kazuhiko Iwasaki (Tokyo Metro. Univ.), Katsuyuki Nakano, Michihiro Shintani, Kazumi Hatayama, Takashi Aikyo (STARC) |
| |
15:05-15:20 |
Break ( 15 min. ) |
Mon, Feb 16 PM
15:20 - 16:35 |
| (9) |
15:20-15:45 |
A Method to Increase the Number of Don't care based on Easy- To-Detected Faults
-- Application for BAST Architecture -- DC2008-76 |
LingLing Wan (Graduate Schoo of Nihon Univ.), Motohiro Wakazono (Graduate School of Nihon Univ.), Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ.) |
| (10) |
15:45-16:10 |
Resource Binding to Minimize the Number of RTL Paths DC2008-77 |
Yuichi Uemoto, Satoshi Ohtake, Michiko Inoue, Hideo Fujiwara (Nara Inst. of Scie and Tech.) |
| (11) |
16:10-16:35 |
A Secure Scan Design Approach using Extended de Bruijn Graph DC2008-78 |
Hideo Fujiwara, Marie Engelene J. Obien (NAIST) |
| Contact Address and Latest Schedule Information |
| DC |
Technical Committee on Dependable Computing (DC) [Latest Schedule]
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| Contact Address |
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Last modified: 2008-12-17 09:12:59
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