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Technical Committee on Integrated Circuits and Devices (ICD) [schedule] [select]
Chair Makoto Ikeda (Univ. of Tokyo)
Vice Chair Hayato Wakabayashi (Sony Semiconductor Solutions)
Secretary Yoshiaki Yoshihara (Kioxia), Kosuke Miyaji (Shinshu Univ.)
Assistant Ryo Shirai (Kyoto Univ.), Jun Shiomi (Osaka Univ.), Takeshi Kuboki (Kumamoto Univ.)

Conference Date Thu, Apr 11, 2024 09:30 - 16:10
Fri, Apr 12, 2024 09:30 - 16:10
Topics  
Conference Place Kawasaki City Industrial Promotion, Room4, 10F 
Address 66-20,Horikawa-cho, Saiwai-ku, Kawasaki, Kanagawa 212-0013
Transportation Guide https://kawasaki-sanshinkaikan.jp/
Sponsors This conference is co-sponsored by IEEE SSCS Japan Chapter and IEEE SSCS Kansai Chapter.
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Registration Fee This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on ICD.

Thu, Apr 11 AM 
09:30 - 11:35
(1) 09:30-10:20 [Invited Talk]
Information retrieval processors with PWM architecture
-- Pursuing the ideal of Neumann type computers --
ICD2024-1
Katsumi Inoue (AOT)
(2) 10:20-10:45 [Invited Lecture]
A 3nm 32.5 TOPS/W, 55.0 TOPS/mm2 and 3.78 Mb/mm2 Fully Digital Computing-in-Memory Supporting INT12 x INT12 with Parallel MAC Architecture
HIdehiro Fujiwara (TSMC)
(3) 10:45-11:10 [Invited Lecture]
An SPN Strong PUF with SRAM-based Entropy Source Featuring Both 100-Bit Output Space and Modeling Attack Resilience ICD2024-2
Kunyang Liu (Kyoto Univ.), Yichen Tang (Lenovo), Shufan Xu, Kiichi Niitsu (Kyoto Univ.), Hirofumi Shinohara (Waseda Univ.)
(4) 11:10-11:35 A Proposal for Thermal Problems of IC Using Waveguide
-- Technology to Combat Thermal Problems Using Electromagnetic Waveguides --
ICD2024-3
Kazuyuki Ouchi (WDL)
  12:00-13:00 Break ( 60 min. )
Thu, Apr 11 PM 
13:00 - 14:15
(5) 13:00-13:25 NanoBridge Based Nonvolatile Memory Macro for High-temperature Operation ICD2024-4 Ryusuke Nebashi, Koichiro Okamoto, Toshitsugu Sakamoto, Munehiro Tada (NBS)
(6) 13:25-13:50 [Invited Lecture]
Demonstration of Accelerated STT-Switching and High Retention in a scaled MTJ towards High-Density STT-MRAM ICD2024-5
Shogo Itai, Masaru Toko, Hideyuki Sugiyama, Chikayoshi Kamata, Rina Takashima, Takeo Koike, Masahiko Nakayama (Kioxia Corporation)
(7) 13:50-14:15 [Invited Lecture]
A 22 nm 10.8 Mb Embedded STT MRAM Macro Achieving over 200 MHz Random Read Access and a 10.4 MB/s Write Throughput for High End MCUs ICD2024-6
Masayuki Izuna, Tomoya Ogawa, Ken Matsubara, Yasuhiko Taito, Tomoya Saito, Koichi Takeda, Yoshinobu Kaneda, Takahiro Shimoi, Hidenori Mitani, Takashi Ito, Takashi Kono (Renesas Electronics)
  14:15-14:30 Break ( 15 min. )
Thu, Apr 11 PM 
14:30 - 16:10
(8) 14:30-14:55 [Invited Lecture]
A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing ICD2024-7
Kenta Suzuki, Keizo Hiraga, Bessho Kazuhiro (Sony), Kimiyoshi Usami (SIT), Taku Umebayashi (Sony)
(9) 14:55-15:45 [Invited Talk]
A818-4094TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and Transformers ICD2024-8
Kentaro Yoshioka (Keio)
(10) 15:45-16:10 [Invited Lecture]
SONOS Embedded Flash IP Using Trap-Depth-Controlled SiN Film Enabling Data Retention more than 10 years at 200C
Shoji Yoshida, Yashuhiro Taniguchi (Floadia)
Fri, Apr 12 AM 
09:30 - 11:35
(11) 09:30-10:20 [Invited Talk]
High Density Dynamic Flash Memory (DFM) ICD2024-9
Koji Sakui (Unisantis)
(12) 10:20-10:45 [Invited Lecture]
Low Power and Thermal Throttling-less SSD with In-Package Boost Converter for 1000-WL Layer 3D Flash Memory ICD2024-10
Kazuma Hasegawa, Yuta Aiba, Xu Li, Hitomi Tanaka, Takayuki Miyazaki, Tomoya Sanuki (KIC)
(13) 10:45-11:35 [Invited Talk]
Recent Developments and Challenges for NAND Flash Memory Interface ICD2024-11
Takashi Toi (KIOXIA)
  12:00-13:00 Break ( 60 min. )
Fri, Apr 12 PM 
13:00 - 14:30
(14) 13:00-13:25 [Invited Lecture]
A 1Tb Density 3bits/Cell 3D-NAND Flash on a 2YY Tiers Technology with 300MB/s Write Throughput ICD2024-12
Koichi Kawai, Hidehiko Kuge (Micron)
(15) 13:25-13:50 [Invited Lecture]
5-Bit/2Cell(X2.5), 7-Bit/2Cell(X3.5), 9-Bit/2Cell(X4.5) NAND Flash Memory: Half Bit technology ICD2024-13
Noboru Shibata, Hironori Uchikawa, Taira Shibuya, Kenri Nakai, Kosuke Yanagidaira, Kosuke Yanagidaira (KIOXIA)
(16) 13:50-14:15 [Invited Lecture]
Development of a Bridge Chip for Scalable Performance and Capacity Storage Systems ICD2024-14
Shinichi Ikeda, Akira Iwata, Goichi Otomo, Tomoaki Suzuki, Hiroaki Iijima, Mikio Shiraishi, Shinya Kawakami, Masatomo Eimitsu, Yoshiki Matsuoka, Kiyohito Sato, Shigehiro Tsuchiya, Yoshinori Shigeta, Takuma Aoyama (Kioxia)
  14:15-14:30 Break ( 15 min. )
Fri, Apr 12 PM 
14:30 - 16:10
(17) 14:30-14:55 [Invited Lecture]
A bi-stable 1-transistor SRAM and a boosted transistor having intrinsic open-base BJT ICD2024-15
Yuniarto Widjaja, Christopher Norwood, Kuk-Hwan Kim (Zeno Semiconductor, Inc.)
(18) 14:55-15:20 [Invited Lecture]
遠端ビット線プリチャージとウィークビットトラッキング回路を用いて0.48 - 1.2V動作電圧範囲と27.6Mbit/mm^2の高集積密度を実現する3ナノメートルSRAM
Yumito Aoyagi, Makoto Yabuuchi, Tomotaka Tanaka, Yuichiro Ishii, Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Isabel Wang, Yu-Hao Hsu, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang (TSMC)
(19) 15:20-15:45 [Invited Lecture]
3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications
Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li, Hidehiro Fujiwara, Hung-Jen Liao, Tsung-Yung Jonathan Chang (TSMC)
(20) 15:45-16:10 [Invited Lecture]
A 3nm-FinFET 4.3 GHz 21.1 Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with a Folded-Bitline Multi-Bank Architecture
Masaru Haraguchi, Yorinobu Fujino, Yoshisato Yokoyama, Ming-Hung Chang, Yu-Hao Hsu, Hong-Chen Cheng, Koji Nii, Yih Wang, Tsung-Yung Jonathan Chang (TSMC)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Invited LectureEach speech will have 20 minutes for presentation and 5 minutes for discussion.
Invited TalkEach speech will have 45 minutes for presentation and 5 minutes for discussion.
Keynote AddressEach speech will have 55 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
ICD Technical Committee on Integrated Circuits and Devices (ICD)   [Latest Schedule]
Contact Address Takeshi Kuboki (Kumamoto University)
E--mail: boieee 


Last modified: 2024-04-11 10:58:34


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