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Technical Committee on Dependable Computing (DC)  (Searched in: 2014)

Search Results: Keywords 'from:2015-02-13 to:2015-02-13'

[Go to Official DC Homepage (Japanese)] 
Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 10 of 10  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2015-02-13
10:00
Tokyo Kikai-Shinko-Kaikan Bldg Studies on FPGA Rejuvenation
Aromhack Saysanasongkham, Satoshi Fukumoto (Tokyo Metropolitan Univ.) DC2014-78
In this paper, feasibility studies on implementing rejuvenation techniques on SRAM-based FPGAs are conducted. As a preli... [more] DC2014-78
pp.1-6
DC 2015-02-13
10:25
Tokyo Kikai-Shinko-Kaikan Bldg Study on Reliability Improvements of MLC PCM by Threshold Modification
Shinya Nakano, Masayuki Arai (Nihon Uni.v) DC2014-79
 [more] DC2014-79
pp.7-12
DC 2015-02-13
10:50
Tokyo Kikai-Shinko-Kaikan Bldg Note on Evaluation of Dependable Design Based on Approximate Logic
Haruki Saito, Masayuki Arai (Nihon Uni.v) DC2014-80
 [more] DC2014-80
pp.13-18
DC 2015-02-13
11:30
Tokyo Kikai-Shinko-Kaikan Bldg A Hardware Trojan Circuit Detection Method Based on Information of Nontransitional Lines
Tomohiro Bouyashiki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (KUS) DC2014-81
 [more] DC2014-81
pp.19-24
DC 2015-02-13
11:55
Tokyo Kikai-Shinko-Kaikan Bldg Test Method for Encryption LSI against Scan-based Attacks
Masayoshi Yoshimura (Kyoto Sangyo Univ.), Jun Nishimaki, Toshinori Hosokawa (Nihon Univ.) DC2014-82
 [more] DC2014-82
pp.25-30
DC 2015-02-13
13:45
Tokyo Kikai-Shinko-Kaikan Bldg Report of International Test Conference
ITC Asian Committee (ITC Asian Comm) DC2014-83
 [more] DC2014-83
pp.31-36
DC 2015-02-13
14:55
Tokyo Kikai-Shinko-Kaikan Bldg A Method of Scheduling in High-Level Synthesis for Hierarchical Testability
Jun Nishimaki, Toshinori Hosokawa (Nihon Univ.), Hideo Fujiwara (Osaka Gakuin Univ.) DC2014-84
We previously proposed a binding method for hierarchical testability to increase the number of hierarchically testable f... [more] DC2014-84
pp.37-42
DC 2015-02-13
15:20
Tokyo Kikai-Shinko-Kaikan Bldg A Method of LFSR Seed Generation for Hierarchical BIST
Kosuke Sawaki, Satoshi Ohtake (Oita Univ.) DC2014-85
A linear feedback shift register (LFSR) is used as a test pattern generator of built-in self-test (BIST).
In BIST, alth... [more]
DC2014-85
pp.43-48
DC 2015-02-13
16:00
Tokyo Kikai-Shinko-Kaikan Bldg An Evalution of a Fault Diagnosis Method for Single Logical Faults Using Multi Cycle Capture Test Sets
Hideyuki Takano, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meiji Univ.) DC2014-86
Multi-cycle capture testing has been proposed to improve test quality of scan testing. However, fault diagnosis for mult... [more] DC2014-86
pp.49-54
DC 2015-02-13
16:25
Tokyo Kikai-Shinko-Kaikan Bldg A Simulated Annealing based Low IR Drop Pattern Selection Method for Resistive Open Fault Diagnosis
Senling Wang, Taiga Inoue, Hanan T.al-awadhi, Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.) DC2014-87
 [more] DC2014-87
pp.55-60
 Results 1 - 10 of 10  /   
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