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Special Interest Group on System and LSI Design Methodology (IPSJ-SLDM)  (Searched in: 2016)

Search Results: Keywords 'from:2016-05-11 to:2016-05-11'
[Go to Official IPSJ-SLDM Homepage (Japanese)] 
Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 7 of 7  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, IPSJ-SLDM 2016-05-11
10:00		 Fukuoka Kitakyushu International Conference Center An Application of Subgradient Method to Delay Analysis
Hiroshi Miyashita, Koutaro Kawaraguchi (The Univ. of Kitakyushu) VLD2016-1		  [more] VLD2016-1
pp.1-4
VLD, IPSJ-SLDM 2016-05-11
10:25		 Fukuoka Kitakyushu International Conference Center Self-Aligned Double Patterning-Aware Two-color Grid Routing
Hatsuhiko Miura, Mitsuru Hasegawa, Taku Hirukawa, Kunihiro Fujiyoshi (TUAT) VLD2016-2		 Self-Aligned Double Patterning (SADP) is one of the promising manufacturing option to overcome the limit of miniaturizat... [more] VLD2016-2
pp.5-10
VLD, IPSJ-SLDM 2016-05-11
13:50		 Fukuoka Kitakyushu International Conference Center Multi bit soft error tolerant FPGA architecture
Yuji Nakamura, Takuya Teraoka, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) VLD2016-3		 Due to reaching the nanoscale transistor size, effect of soft error to the memory has become conspicuous. In small devic... [more] VLD2016-3
pp.35-40
VLD, IPSJ-SLDM 2016-05-11
14:30		 Fukuoka Kitakyushu International Conference Center A High-Level Synthesis Algorithm using Critical Path Optimization Based Operation Chainings for RDR Architectures
Kotaro Terada, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2016-4		 In deep-submicron era, interconnection delays are not negligible even in high-level synthesis. RDR (Regular Distributed ... [more] VLD2016-4
pp.41-46
VLD, IPSJ-SLDM 2016-05-11
14:55		 Fukuoka Kitakyushu International Conference Center A Note on Scheduling Problem Considering the Radiation Resistance of Registers
Keisuke Inoue (KTC), Mineo Kaneko (JAIST) 		This paper discusses a high-level design of an application specific integrated circuit (ASIC) with radiation resistance.... [more]
VLD, IPSJ-SLDM 2016-05-11
15:20		 Fukuoka Kitakyushu International Conference Center MERP-CNN: A Memory-Efficient Reconfigurable Processor for Convolutional Neural Networks Based on FPGA
Xushen Han, Dajiang Zhou, Shinji Kimura (Waseda Univ.) VLD2016-5		 Convolutional neural network has been paid so much attention in many intelligent applications especially image pattern r... [more] VLD2016-5
pp.47-52
VLD, IPSJ-SLDM 2016-05-11
16:00		 Fukuoka Kitakyushu International Conference Center [Invited Talk] Challenges of DA Technologies for the Future -- For the Establishment of Next Generation DA Technologies --
Michiaki Muraoka (Kochi Univ.) VLD2016-6		 For the Establishment of Next Generation DA Technologies [more] VLD2016-6
p.53
 Results 1 - 7 of 7  /   
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