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Technical Committee on Computer Systems (CPSY) (Searched in: 2012)
Search Results: Keywords 'from:2012-11-26 to:2012-11-26'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 13:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Effective Orderings of Instances and Variable Assignments in SAT-based ATPG with Solution Reuse Kenji Ueda, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.)  VLD2012-83 DC2012-49 |
This report discusses the efficiency of iteratively solving various instances with solution reuse in test generation ba... [more] |
VLD2012-83 DC2012-49 pp.141-146 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 13:25 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A Heuristic Algorithm for Operational Unit Binding in Transient Fault Tolerant Datapath Synthesis Tatsuya Nakaso, Ryoko Ohkubo, Tsuyoshi Iwagaki, Hideyuki Ichihara, Tomoo Inoue (Hiroshima City Univ.) VLD2012-84 DC2012-50 |
Due to the increase in the integration, operational speed and application complexity, the tolerance for transient faul... [more] |
VLD2012-84 DC2012-50 pp.147-152 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 13:50 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Dynamic Timing-Test Scheduling for Post-Silicon Skew Tuning Mineo Kaneko (JAIST) VLD2012-85 DC2012-51 |
[more] | VLD2012-85 DC2012-51 pp.153-158 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 14:15 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A novel efficient data structure representing shared DAG patterns Yusuke Matsunaga (Kyushu Univ.) VLD2012-86 DC2012-52 |
Technology mapping and local rewriting in logic synthesis use many small size DAG patterns. Even though they share the i... [more] | VLD2012-86 DC2012-52 pp.159-162 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 17:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | [Keynote Address]
Dynamically Reconfigurable Processor (DRP) Technology: Current Status and Future Prospects Masato Motomura (Hokkaido Univ.), Koichiro Furuta, Toru Awashima, Yasunari Shida (Renesas Electronics) VLD2012-87 CPM2012-117 ICD2012-81 CPSY2012-55 DC2012-53 RECONF2012-49 |
DRP features two dimensional array of tiny processors and memories, onto which applications are compiled and mapped as a... [more] | VLD2012-87 CPM2012-117 ICD2012-81 CPSY2012-55 DC2012-53 RECONF2012-49 p.163(VLD), p.29(CPM), p.29(ICD), p.45(CPSY), p.163(DC), p.15(RECONF) |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A Basic Study of FPGA Routing Architecture Based on Scale Free Network Satoshi Hayama, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-50 |
FPGA(Fiele Programmable Gate Array) has many routing resources in order to provide the flexibility. These routing resou... [more] |
RECONF2012-50 pp.17-22 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:25 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | 0.18um CMOS process dynamic optically reconfigurable gate array VLSI Takayuki Kubota, Minoru Watanabe (Shizuoka Univ.) RECONF2012-51 |
[more] | RECONF2012-51 pp.23-27 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:50 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A 9-context optically reconfigurable gate array using a polymer-dispersed liquid crystal holographic memory Retsu Moriwaki, Minoru Watanabe (Shizuoka Univ.), Akifumi Ogiwara (Kobe City College of Tech.) RECONF2012-52 |
[more] | RECONF2012-52 pp.29-32 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:25 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A Single Chip Image Processor for Various In-car Display Equipments Yoshihiro Ogawa, Yoshiyuki Kato, Takashi Shinohara, Takeo Fujita, Noriyuki Minegishi (MITSUBISHI) |
This paper presents a single chip image processor for various in-car equipments such as car navigation system, rear seat... [more] | |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:50 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Development of SoC Fast Electric Power Estimation System FPA2 Takayuki Sasaki (FUJITSU LAB.) CPM2012-118 ICD2012-82 |
FPA2 (Fast Power Analyzer 2) was developed and is fast electric power estimation system for SoC (System on a Chip). Sinc... [more] | CPM2012-118 ICD2012-82 pp.31-36 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | On Handling Cell Placement with Adjacent Common Centroid Constraints for Analog IC Layout Design Kunihiro Fujiyoshi, Keitaro Ue (TUAT) VLD2012-88 DC2012-54 |
(To be available after the conference date) [more] | VLD2012-88 DC2012-54 pp.165-170 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:25 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Routability-oriented Common-Centroid Capacitor Array Generation Jing Li, Bo Yang (Design Algorithm Lab.), Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2012-89 DC2012-55 |
We address layout generation of on-chip matched capacitors with the high relative accuracy. Unit capacitors are placed i... [more] | VLD2012-89 DC2012-55 pp.171-175 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:50 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Performance evaluation of Via Programmable Logic VPEX using P&R tool Taku Otani, Ryohei Hori, Taisuke Ueoka (Ritsumeikan Univ), Masaya Yoshikawa (Meijo Univ), Takeshi Fujino (Ritsumeikan Univ) VLD2012-90 DC2012-56 |
We have been studying via programmable structured ASIC architecture “VPEX” which can realize arbitrary logic by customiz... [more] | VLD2012-90 DC2012-56 pp.177-182 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 10:30 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A Hardware Algorithm Using Dynamically Partially Reconfigurable FPGAs for Solving the Maximum Clique Problem of Large Graphs Chikako Miura, Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi (Hiroshima City Univ.) RECONF2012-53 |
In this paper, we propose a hardware algorithm to solve the maximum clique problem of large graphs, and show its impleme... [more] | RECONF2012-53 pp.33-38 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 10:55 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A Winning Board Detector Using an Index Generation Unit Kousiro Shiihara, Yuki Idokawa, Hiroki Nakahara (Kaoghima Univ.) RECONF2012-54 |
Connect6 is a two-player game similar to Gomoku. Two players, those are Black and White, alternately place two stones o... [more] |
RECONF2012-54 pp.39-44 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 11:20 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | An Implementation of a Tiny Spectrometer for a Radio Telescope on an Extensible Processing Platform Hiroki Nakahara, Hiroyuki Nakanishi (Kagosima Univ.), Tsutomu Sasao (KIT) RECONF2012-55 |
A radio telescope analyzes radio frequency~(RF) received from celestial objects. It consists of the antenna, the receiv... [more] |
RECONF2012-55 pp.45-50 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 10:30 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Signal Evaluation Circuit for BD Multi-layer Recording Yusuke Nakamura, Hiroyuki Minemura, Takahiro Kurokawa, Taku Hoshizawa (Hitachi) CPM2012-119 ICD2012-83 |
BDXL(TM), which has quadruple 32-GB layers or triple 33-GB layers, is higher linear-density than Blu-ray Disc(TM). There... [more] | CPM2012-119 ICD2012-83 pp.37-41 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 10:55 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | AES Cryptographic Circuit utilizing Dual-Rail RSL Memory Technique Yuki Hashimoto, Mitsuru Shiozaki, Takaya Kubota, Takeshi Fujino (Ritsumeikan Univ.) CPM2012-120 ICD2012-84 |
Tamper LSI design methodology has to be applied in order to implement secure cryptographic circuit, which is resistant t... [more] | CPM2012-120 ICD2012-84 pp.43-48 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 11:20 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Chip Design and Performance evaluation of Via Programmable Analog Circuit Keisuke Ueda, Ryo Nakazawa, Ryohei Hori, Mitsuru Shiozaki, Tomohiro Fujita, Takeshi Fujino (Ritsumeikan Univ.) CPM2012-121 ICD2012-85 |
Recently, programmable analog circuits are started to be used because initial development cost including mask cost is re... [more] | CPM2012-121 ICD2012-85 pp.49-54 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 10:30 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | A LSI-Package-Board co-evaluation of Power noise in the Digital LSI Kumpei Yoshikawa, Yuta Sasaki (Kobe Univ.), Kouji Ichikawa (DENSO), Yoshiyuki Saito (Panasonic), Makoto Nagata (Kobe Univ.) VLD2012-91 DC2012-57 |
Problems related with power noise in LSI system are getting prominent because of the higher integration and lower $V_{d... [more] |
VLD2012-91 DC2012-57 pp.183-188 |
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