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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-05 11:00 |
Hiroshima |
Satellite Campus Hiroshima |
[Keynote Address]
Challenge of Post CMOS Circuit Technologies for AI Hardware Takahiro Hanyu (Tohoku Univ.) |
Recently, it is impartant that the impact of artificial intelligence (AI) is being widely understood in several applicat... [more] |
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NC |
2011-10-20 14:25 |
Fukuoka |
Ohashi Campus, Kyushu Univ. |
A Spiking Neuron Device Consisting of Nanodisk Array Structures and CMOS Circuits Haichao Liang, Takashi Morie, Yilai Sun (Kyutech), Makoto Igarashi, Seiji Samukawa (Tohoku Univ.) NC2011-66 |
We propose an integrate-and-fire type spiking neuron device consisting of CMOS circuits and nanodisk array structures fa... [more] |
NC2011-66 pp.125-129 |
ICD |
2008-12-12 16:35 |
Tokyo |
Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan |
Post-Silicon Programmed Body-Biasing Platform Suppressing Device Variability in 45 nm CMOS Technology Issei Kashima, Hiroaki Suzuki, Masanori Kurimoto (Renesas Technology Corp), Tadao Yamanaka (Renesas Design), Hidehiro Takata (Renesas Technology Corp), Hiroshi Makino (Osaka Institute of Tech), Hirofumi Shinohara (Renesas Technology Corp) ICD2008-128 |
The Post-Silicon Programmed Body-Biasing Platform is proposed to suppress device variability in the 45-nm CMOS technolog... [more] |
ICD2008-128 pp.137-142 |
ICD, SDM |
2008-07-17 15:55 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Co-design of CNT based devices and circuitry
-- How can CNT-based circuit overcome Si-CMOS? -- Shinobu Fujita (Toshiba RDC) SDM2008-138 ICD2008-48 |
Emerging devices using new materials (post-Si) are expected to replace Si-based MOSFET in future. This paper firstly cla... [more] |
SDM2008-138 ICD2008-48 pp.59-64 |
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-20 15:35 |
Fukuoka |
Kitakyushu International Conference Center |
An On-Chip Bus Architecture for Post-Fabrication Timing Calibration Masaki Yamaguchi, Masanori Muroyama, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ.) |
As the transistor size shrinks, the horizontal coupling capacitance between adjacent wires becomes dominant for wire loa... [more] |
VLD2007-79 DC2007-34 pp.55-60 |
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