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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC | 2018-02-20 14:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Golden-Free Hardware Trojan Detection Technique Considering Intra-Die Variation Fakir Sharif Hossain, Tomokazu Yoneda, Michihiro Shintani, Michiko Inoue (NAIST), Alex Orailoglu (Univ. of California, San Diego)  DC2017-84 |
High detection sensitivity in the presence of process variation is a key challenge for hardware Trojan detection through... [more] | DC2017-84 pp.43-48 |
| SDM | 2017-11-09 14:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Characterization and modeling of SiC power MOSFET Takashi Sato, Kazuki Oishi, Masayuki Hiromoto (Kyoto Univ.), Michihiro Shintani (NAIST) SDM2017-65 |
(To be available after the conference date) [more] | SDM2017-65 pp.21-26 |
| VLD | 2015-03-03 08:50 |
Okinawa | Okinawa Seinen Kaikan | A Processor-Level NBTI Mitigation Technique of Applying Anti-Aging Gate Control through Instruction Set Architecture Song Bian, Michihiro Shintani (Kyoto Univ.), Zheng Wang (RWTH Aachen Univ.), Masayuki Hiromoto (Kyoto Univ.), Anupam Chattopadhyay (Nanyang Tech. Univ.), Takashi Sato (Kyoto Univ.) VLD2014-161 |
[more] | VLD2014-161 pp.49-54 |
| DC | 2014-02-10 12:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Device-parameter Estimation Using Framework of Fmax Testing Michihiro Shintani, Takashi Sato (Kyoto Univ.) DC2013-85 |
[more] | DC2013-85 pp.37-42 |
| VLD | 2013-03-04 14:15 |
Okinawa | Okinawa Seinen Kaikan | Acceleration of current-threshold determination toward on-line IDDQ testing through parameter estimation Michihiro Shintani, Takashi Sato (Kyoto Univ.) VLD2012-137 |
[more] | VLD2012-137 pp.7-12 |
| VLD | 2013-03-05 16:00 |
Okinawa | Okinawa Seinen Kaikan | [Memorial Lecture]
An Adaptive Current-Threshold Determination for IDDQ Testing Based on Bayesian Process Parameter Estimation Michihiro Shintani, Takashi Sato (Kyoto Univ.) VLD2012-152 |
[more] | VLD2012-152 p.91 |
| VLD | 2012-03-06 10:10 |
Oita | B-con Plaza | Global Process Parameter Estimation Using IDDQ Current Signature Michihiro Shintani, Takashi Sato (Kyoto Univ.) VLD2011-120 |
[more] | VLD2011-120 pp.1-6 |
| DC | 2012-02-13 15:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | An approach for adaptive determination of IDDQ testing criteria based on process parameter estimation Michihiro Shintani, Takashi Sato (Kyoto Univ.) DC2011-84 |
[more] | DC2011-84 pp.49-54 |
| DC | 2011-02-14 11:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Variation Aware Test Methodology Based on Statistical Static Timing Analysis Michihiro Shintani, Kazumi Hatayama, Takashi Aikyo (STARC) DC2010-62 |
The continuing miniaturization of LSI dimension may cause parametric faults which exceed the specification due to proces... [more] | DC2010-62 pp.21-26 |
| DC | 2009-02-16 14:40 |
Tokyo | Note on Small Delay Fault Model for Intra-Gate Resistive Open Defects Masayuki Arai, Akifumi Suto, Kazuhiko Iwasaki (Tokyo Metro. Univ.), Katsuyuki Nakano, Michihiro Shintani, Kazumi Hatayama, Takashi Aikyo (STARC) DC2008-75 |
[more] | DC2008-75 pp.43-48 |
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