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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
DC, CPSY, IPSJ-SLDM, IPSJ-EMB |
2009-03-05 15:45 |
Niigata |
Sado Island Integrated Development Center |
Single-Cycle-Accessible Two-Level Cache Architecture Seiichiro Yamaguchi, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ.) CPSY2008-91 DC2008-82 |
A small L0-cache located between an MPU core and an L1-cache is widely used in embedded processors for reducing the ener... [more] |
CPSY2008-91 DC2008-82 pp.19-24 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 16:05 |
Fukuoka |
Kitakyushu Science and Research Park |
Insertion-Point Selection of Canary FF for Timing Error Prediction Yuji Kunitake (Kyushu Univ.), Toshinori Sato (Fukuoka Univ.), Seiichiro Yamaguchi, Hiroto Yasuura (Kyushu Univ.) |
The deep submicron semiconductor technologies increase parameter ariations. The increase in parameter variations require... [more] |
VLD2008-74 DC2008-42 pp.85-89 |
DC, CPSY, IPSJ-SLDM, IPSJ-EMB |
2008-03-27 08:45 |
Kagoshima |
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An Adaptive Multi-Performance Processor and its Evaluation Seiichiro Yamaguchi, Yuichiro Oyama (Kyushu Univ.), Yuji Kunitake (Kyushu Inst. of Tech.), Tadayuki Matsumura, Yuriko Ishitobi, Masaki Yamaguchi, Donghoon Lee, Yusuke Kaneda (Kyushu Univ.), Toshimasa Funaki (Kyushu Inst. of Tech.), Masanori Muroyama, Tohru Ishihara, Toshinori Sato (Kyushu Univ.) DC2007-84 CPSY2007-80 |
This paper presents an energy efficient processor which can be used as a design alternative for the dynamic voltage scal... [more] |
DC2007-84 CPSY2007-80 pp.1-6 |
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-20 10:05 |
Fukuoka |
Kitakyushu International Conference Center |
A Memory Management Technique for Energy Reduction in Multi-Task Embedded Applications Seiichiro Yamaguchi, Masanori Muroyama, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ.) |
Memory systems consume a significant amount of the energy in embedded systems. Static code placement techniques using sc... [more] |
VLD2007-74 DC2007-29 pp.25-29 |
VLD, IPSJ-SLDM |
2006-05-11 15:00 |
Ehime |
Ehime University |
A Software-level Energy Reduction Technique for Embedded Microprocessor Exploiting Narrow Bitwidth Operations Seiichiro Yamaguchi, Masanori Muroyama, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ.) |
This paper proposes a software-level energy reduction technique for microprocessor-based embedded systems. A basic idea ... [more] |
VLD2006-3 pp.13-18 |
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