| IEICE Technical Committee Submission System Conference Schedule |
Online Proceedings [Sign in] Tech. Rep. Archives |
All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| IT | 2019-07-26 10:30 |
Tokyo | NATULUCK-Iidabashi-Higashiguchi Ekimaeten | Unbiased Estimation Equation for f-Separable Bregman Distortion Measures and the Properties of Its Estimators Masahiro Kobayashi, Kazuho Watanabe (Toyohashi Tech.)  IT2019-22 |
In this study, we discuss unbiased estimation equations in a class of objective function using the monotonically increas... [more] | IT2019-22 pp.37-42 |
| ICD, CPSY | 2016-12-16 09:40 |
Tokyo | Tokyo Institute of Technology | Automatic Design of Bias Circuit Based on the Results of Characterized MOSFET Kento Suzuki, Nobukazu Takai, Yoshiki Sugawara, Kazuto Okochi, Satoshi Yoshizawa, Tsukasa Ishii, Saki Shinoda, Masafumi Fukuda (Gunma Univ.) ICD2016-91 CPSY2016-97 |
It is difficult to design optimal analog circuit in a short time in terms of designing flexibility. In an analog circuit... [more] | ICD2016-91 CPSY2016-97 pp.119-122 |
| ICM, CQ, NS, NV (Joint) |
2014-11-14 15:10 |
Kochi | Kochi-City-Culture-Plaza CUL-PORT | Analysis of Memory Bias of Network Quality to Users' Communication Behavior during Web Browsing Hideyuki Koto, Norihiro Fukumoto, Sumaru Niida, Shigehiro Ano (KDDI R&D Labs.), Shin'ichi Arakawa, Masayuki Murata (Osaka Univ.) NS2014-144 |
As the contents of the Internet become richer, quality of communication network plays a key role in determining the perc... [more] | NS2014-144 pp.93-98 |
| IT, ISEC, WBS | 2013-03-07 14:30 |
Osaka | Kwansei Gakuin Univ., Osaka-Umeda Campus | Performance Evaluation of a Combination of Sum-Product and Two-bit Bit Flipping Decoding Algorithms Koh Matsushita, Hiroshi Kamabe (Gifu Univ.) IT2012-72 ISEC2012-90 WBS2012-58 |
A Bit-Flipping algorith which uses only two bits for each node has been proposed. The bit error probability of the metho... [more] | IT2012-72 ISEC2012-90 WBS2012-58 pp.65-70 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 10:10 |
Fukuoka | Kyushu University | A study of high-performance asynchronous network-on-chip focused on bias of packets transfer routes Satoshi Takeyasu, Masashi Imai, Hiroshi Nakamura (Tokyo Univ.) VLD2010-66 DC2010-33 |
GALS-NoC is recently paid attention. Beside, NoC have commonly bias of packets transfer routes by regularity of network ... [more] | VLD2010-66 DC2010-33 pp.67-72 |
| VLD | 2009-03-13 11:05 |
Okinawa | Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in Subthreshold Circuits Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye (Osaka Univ./JST-CREST) VLD2008-160 |
This paper presents modeling of manufacturing variability and body bias effect for subthreshold circuits based on mea... [more] |
VLD2008-160 pp.201-206 |
|
| IE, SIP | 2005-04-22 13:25 |
Tokyo | Minimum-Variance Pseudo-Unbiased Low-Rank Estimation
-- A Generalization of Marquardt's Estimator for Ill-Conditioned Inverse Problems -- Jamal Elbadraoui, Isao Yamada (Tokyo Inst. of Tech.) |
This paper presents a novel low-rank linear statistical estimator named minimum-variance pseudo-unbiased low-rank estima... [more] | SIP2005-6 IE2005-6 pp.31-36 |
|
[Return to Top Page]