IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 107, Number 296

VLSI Design Technologies

Workshop Date : 2007-10-31 / Issue Date : 2007-10-24

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Table of contents

VLD2007-60
An analysis of retention time of a DORGA with a constant irradiation period
Daisaku Seto, Minoru Watanabe (Shizuoka Univ.)
pp. 1 - 6

VLD2007-61
Fast dynamic optical reconfigurations of multi-context ORGAs
Mao Nakajima, Minoru Watanabe (Shizuoka Univ.)
pp. 7 - 11

VLD2007-62
Fast optical configurations using context superimposition
Naoki Yamaguchi, Minoru Watanabe (Shizuoka Univ.)
pp. 13 - 16

VLD2007-63
Study of litho weak points detecting method using TCC's eigen vector
Satoshi Yoshikawa (FUJITSU VLSI), Hiroki Futatuya, Tatsuo Chijimatsu, Satoru Asai (FUJITSU)
pp. 17 - 20

VLD2007-64
[Invited Talk] TBD
Masanori Hashimoto (Osaka Univ.)
pp. 21 - 24

VLD2007-65
Analysis of Inverter and SRAM circuits characteristics fluctuation
Ryo Tanabe, Yoshio Ashizawa, Hideki Oka (Fujitsu Labs.)
pp. 25 - 29

VLD2007-66
The Analysis of MOSFET Characteristic Fluctuation Caused by Layout Variation
Kunio Anzai, Hitoshi Tsuno, Masao Matsumura, Satoe Minami, Yohei Hiura, Akira Takeo, Fu Wingsze, Yuzo Fukuzaki, Michihiro Kanno, Naoki Nagashima, Hisahiro Ansai (Sony)
pp. 31 - 34

VLD2007-67
Scaled CMOS Modeling on Analog Small Signal parameters
Takeshi Kida, Shin-ichi Ohkawa, Hiroo Masuda (Renesas)
pp. 35 - 39

VLD2007-68
Modeling of Floating-Body Effect in SOI-MOSFET with Complete Surface-Potential Description
Takahiro Murakami, Makoto Ando, Norio Sadachika (Hiroshima Univ.), Takaki Yoshida (NIS), Mitiko Miura-Mattausch (Hiroshima Univ.)
pp. 41 - 45

VLD2007-69
Technical Trends of Mismatch Modeling on Analog CMOS Circuit
Hiroo Masuda, Takeshi Kida, Shin-ichi Ohkawa (Renesas)
pp. 47 - 54

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan