Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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VLD2010-1
High-Level Synthesis with Floorplan for GDR Architectures and its Evaluation
Akira Ohchi, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki (Waseda Univ.)
pp. 19 - 24
VLD2010-2
Highly Accurate Approximate Methods for Soft Error Tolerance Estimation for Sequential Circuits
Naoki Shirobayashi, Yusuke Akamine, Masayoshi Yoshimura, Yusuke Matsunaga (Kyushu Univ.)
pp. 25 - 30
VLD2010-3
An Approximate Method for Steady State Probability Calculation based on FSM Splitting
So Hasegawa, Yusuke Akamine, Masayoshi Yoshimura, Yusuke Matsunaga (Kyushu Univ.)
pp. 31 - 36
VLD2010-4
Error Propagation Probability-based Selective TMR for Reliable Coarse-Grained Reconfigurable Architecture
Hiroshi Yuasa, Takashi Imagawa, Masayuki Hiromoto, Hiroyuki Ochi, Takashi Sato (Kyoto Univ.)
pp. 37 - 42
VLD2010-5
3D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link
Makoto Saen, Kenichi Osada, Yasuyuki Okuma (Hitachi), Yasuhisa Shimazaki (Keio Univ./Renesas Technology), Itaru Nonomura (Renesas Technology), Kiichi Niitsu, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Tadahiro Kuroda (Keio Univ.)
pp. 43 - 47
VLD2010-6
Implementation of error correction method on small area and low power consumption processor for the capsular detrusor pressure measurement system
Hiroki Ohsawa, Tomohiro Kondo, Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.)
pp. 49 - 54
VLD2010-7
A Wide-Range Clock Synchronizer with Predictive-Delay-Adjustment Scheme for Continuous Voltage Scaling in DVFS Control
Masafumi Onouchi, Yusuke Kanno, Makoto Saen, Shigenobu Komatsu (Hitachi), Yoshihiko Yasu, Koichiro Ishibashi (Renesas)
pp. 67 - 72
VLD2010-8
Temperature-dependent model for break-even time in fine-grain power gating and adaptive control based on the temperature dependence
Kimiyoshi Usami, Tatsunori Hashida (Shibaura Inst. Tech.)
pp. 73 - 78
VLD2010-9
An Efficient Congested Area Specification And Congestion Relaxation by 45 Degree Line for Single Layer Printed Circuit Board Rouitng
Kyosuke Shinoda (Tokyo Tech), Yukihide Kohira (UoA), Atsushi Takahashi (Osaka Univ.)
pp. 79 - 84
VLD2010-10
Variation Modeling of Current Sources by D/A Converter Analysis
Bo Liu, Qing Dong, Bo Yang, Shigetoshi Nakatake (Univ. of Kitakyushu)
pp. 85 - 89
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.