IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 112, Number 173

Computer Systems

Workshop Date : 2012-08-02 - 2012-08-03 / Issue Date : 2012-07-26

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Table of contents

CPSY2012-9
Effect of Loop Unrolling for Two-Path Limited Speculation Method
Yuki Homma, Hiroyoshi Jutori, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.)
pp. 1 - 6

CPSY2012-10
Consideration of Loop Path Predictors based on Branch Prediction Methods
Kazuhiro Kinkai, Hiroyoshi Jutori, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.)
pp. 7 - 12

CPSY2012-11
Application Authentication System on Untrusted OS
Tsuyoshi Yamada, Masahiro Goshima, Shuichi Sakai (UT)
pp. 13 - 18

CPSY2012-12
A Study of Emulator Oriented Small CPU for Realizing Film Computers
Yasuhiko Nakashima (NAIST)
pp. 19 - 24

CPSY2012-13
*
Ryosuke Yamanaka, Jun Yao, Yasuhiko Nakashima (NAIST)
pp. 25 - 30

CPSY2012-14
Co-processor of a low power accelerator CMA
Mai Izawa, Nobuaki Ozaki, Yusuke Koizumi, Rie Uno, Hideharu Amano (Keio Univ.)
pp. 31 - 36

CPSY2012-15
An Optimal Parallel Prefix-sums Algorithm on the Memory Machine Models for GPUs
Koji Nakano (Hiroshima Univ.)
pp. 37 - 42

CPSY2012-16
Proposal of performance model for block ciphers using GPGPU
Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (NDA)
pp. 43 - 48

CPSY2012-17
An Automatic Device Memory Allocation Method for OpenMPC
Hiroaki Uchiyama, Tomoaki Tsumura, Hiroshi Matsuo (Nagoya Inst. of Tech.)
pp. 49 - 54

CPSY2012-18
Implementation of the circuit division for High-Level Synthesis
Daiki Kugami, Takaaki Miyajima, Hideharu Amano (Keio Univ.)
pp. 55 - 60

CPSY2012-19
A development scheduling simulater for reconfiguable system
Takashige Uda, Morihiro Kuga, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 61 - 66

CPSY2012-20
A Method to Enhance Throughput in A Multi-Tasking Environment on A Server with Many-Core Accelerators
Takamichi Miyamoto, Kazuhisa Ishizaka, Takeo Hosomi, Junji Sakai (NEC)
pp. 67 - 72

CPSY2012-21
Automatic CPU-GPU Parallelization for Pseudo Realtime Video Processing Library RaVioli
Shinji Ohira, Tomoaki Tsumura, Hiroshi Matsuo (Nagoya Inst. of Tech.)
pp. 73 - 78

CPSY2012-22
Evaluation of Multi-GPU System with ExpEther
Shimpei Nomura, Tetsuya Nakahama (Keio Univ.), Junichi Higuchi, Jun Suzuki, Takashi Yoshikawa (NEC), Hideharu Amano (Keio Univ.)
pp. 79 - 84

CPSY2012-23
A Discussion for Acceleration of Ray Tracing Algorithms for Lighting Simulation on Several Parallel Computing Environments
Yuki Kurano, Masato Yoshimi, Mitsunori Miki, Tomoyuki Hiroyasu (Doshisha Univ.)
pp. 85 - 90

CPSY2012-24
TCP congestion control algorithm using a perceptron
Junnosuke Kuroda, Naoki Tanida, Kei Hiraki (Univ. of Tokyo)
pp. 91 - 96

CPSY2012-25
Rack Layout Optimization for Random Network Topology
Ikki Fujiwara, Michihiro Koibuchi (NII)
pp. 97 - 102

CPSY2012-26
Improvement of Key Value Store Access Protocol of SSS, A MapReduce System
Hidemoto Nakada, Hirotaka Ogawa, Tomohiro Kudoh (AIST)
pp. 103 - 108

CPSY2012-27
Simulation of Large-Scale Distributed Systems with a Distributed Graph Processing System
Masatoshi Hanai, Kazuyuki Shudo (Tokyo Inst. of Tech.)
pp. 109 - 114

CPSY2012-28
Design and Evaluation of IaaS Management System for Resource Pool Architecture
Tsutomu Kawai, Tsunehisa Doi, Masanobu Yuhara (Fujitsu Labs)
pp. 115 - 120

CPSY2012-29
Fast data recovery for distributed storage systems by Disk Area Network
Yotaro Konishi, Takatsugu Ono, Takashi Miyoshi (Fujitsu Labs.)
pp. 121 - 126

CPSY2012-30
Website-transverse Recommendation Application Based on Contents Captured by Network Router
Kazuki Masuda, Shinichi Ishida, Hiroaki Nishi (Keio Univ.)
pp. 127 - 132

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan