IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Silicon Device and Materials

Workshop Date : 2012-10-25 - 2012-10-26 / Issue Date : 2012-10-18

SDM2012-89
Chemical structures of compositional transition layer at SiO2/Si(100) interface
Tomoyuki Suwa, Akinobu Teramoto (Tohoku Univ.), Takayuki Muro, Toyohiko Kinoshita (JASRI), Shigetoshi Sugawa, Takeo Hattori, Tadahiro Ohmi (Tohoku Univ.)
pp. 1 - 4

SDM2012-90
AR-XPS and HAX-PES Studies on Chemical bonding states at SiO2/SiC Interfaces
Hazuki Okada, Arata Komatsu, Masato Watanabe (Tokyo City Univ.), Yudai Izumi, Takayuki Muro (JASRI), Kentaro Sawano, Hiroshi Nohira (Tokyo City Univ.)
pp. 5 - 9

SDM2012-91
Evaluation of crystalline phase in SiO2 thin film using grazing incidence X-ray diffraction
Kohki Nagata, Takuya Yamaguchi, Atsushi Ogura (Meiji Univ.), Tomoyuki Koganezawa, Ichiro Hirosawa (JASRI), Tomoyuki Suwa, Akinobu Teramoto, Takeo Hattori, Tadahiro Ohmi (NICHe)
pp. 11 - 14

SDM2012-92
Noise Performance of Accumulation MOSFETs
Philippe Gaubert, Akinobu Teramoto, Shigetoshi Sugawa, Tadahiro Ohmi (Tohoku Univ.)
pp. 15 - 20

SDM2012-93
Low Temperature PECVD of High Quality Silicon Nitride for Gate Spacer
Yukihisa Nakao, Akinobu Teramoto, Rihito Kuroda, Tomoyuki Suwa, Hiroaki Tanaka, Shigetoshi Sugawa, Tadahiro Ohmi (Tohoku Univ.)
pp. 21 - 26

SDM2012-94
[Special Talk] Science-Based New Silicon LSI Technologies: New Technologies for the LSI Performance Improvement Instead of Current Device Miniaturization
Tadahiro Ohmi, Yukihisa Nakao, Rihito Kuroda, Tomoyuki Suwa, Hiroaki Tanaka, Shigetoshi Sugawa (Tohoku Univ.)
pp. 27 - 32

SDM2012-95
Fabrication process for pentacene-based vertical OFETs with HfO2 gate insulator
Min Liao (Tokyo Inst. of Tech.), Hiroshi Ishiwara (Konkuk Univ.), Shun-ichiro Ohmi (Tokyo Inst. of Tech.)
pp. 33 - 36

SDM2012-96
Effect of silicon surface roughness on MOSFET performance with ultra-thin HfON gate insulator formed by ECR sputtering
Dae-Hee Han, Shun-ichiro Ohmi (Tokyo Inst. of Tech.)
pp. 37 - 40

SDM2012-97
Ultra high speed wet etching technology for a silicon wafer process
Takeshi Sakai, Tatsuro Yoshida, Kazuhiro Yoshikawa, Tadahiro Ohmi (Tohoku Univ.)
pp. 41 - 45

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan