IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 113, Number 224

Circuits and Systems

Workshop Date : 2013-09-26 - 2013-09-27 / Issue Date : 2013-09-19

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Table of contents

CAS2013-36
Efficient Transient Analysis of 3-D Stacked On-Chip Power Distribution Network with Power/Ground Through Silicon Vias by Using Block Latency Insertion Method
Daisei Nagata, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.)
pp. 1 - 6

CAS2013-37
Multi-Rate Locally Implicit Latency Insertion Method for Fast Transient Analysis of Power Distribution Network
Takaaki Hojo, Shingo Okada, Tadatoshi Sekine, Hideki Asai (Shizuoka Univ.)
pp. 7 - 12

CAS2013-38
A Study on Output Smoothing in Electric Power System with Multiple Homes using Battery
Yoshihiko Yamaguchi, Yoshihiko Susuki, Takashi Hikihara (Kyoto Univ.)
pp. 13 - 18

CAS2013-39
Comparison of allocation methods of chargers for electric vehicles
Shun Sato, Keisuke Nakano, Kazuyuki Miyakita (Niigata Univ.)
pp. 19 - 24

CAS2013-40
Optimization of Switching Phase of a Single Phase PWM DC-AC Inverter
Kazuya Morita, Kenya Jin'no (Nippon Inst. of Tech.)
pp. 25 - 30

CAS2013-41
Analysis of a Manifold Piecewise Linear System with Switching Delay
Asuka Nishimura, Tadashi Tsubone (Nagaoka Univ. of Tech.)
pp. 31 - 34

CAS2013-42
A Study of Phase Dominating Energy-Absorption Rate in a Coupled Oscillator
Madoka Kubota, Takashi Hikihara (Kyoto Univ.)
pp. 35 - 40

CAS2013-43
[Invited Talk] Theoretical Analysis on Quantization Error of β-Encoder
Takaki Makino (Univ. of Tokyo), Yukiko Iwata (Meteorol. College), Yutaka Jitsumatsu (Kyushu Univ.), Masao Hotta, Hao San (Tokyo City Univ.), Kazuyuki Aihara (Univ. of Tokyo)
pp. 41 - 44

CAS2013-44
Dynamic Binary Neural Networks: Storing a Periodic Orbit and its Stabilization
Ryota Kouzuki, Toshimichi Saito (Hosei Univ.)
pp. 45 - 49

CAS2013-45
A study of the packet routing method using mutually connected neural networks
Tohru Takamizawa, Keisuke Kimura, Takayuki Kimura, Kenya Jin'no (Nippon Inst. of Tech.)
pp. 51 - 56

CAS2013-46
A Method of Clock Synchronization for Power Packet Dispatching -- Parameters Optimization in Clock Synchronization --
Yanzi Zhou, Ryo Takahashi, Takashi Hikihara (Kyoto Univ.)
pp. 57 - 62

CAS2013-47
A parameter learning method for Piecewise-Constant Chaos Oscillator with spike trains of desired ISI
Tatsuro Furusawa, Tadashi Tsubone (Nagaoka Univ. of Tech.)
pp. 63 - 66

CAS2013-48
Basic Dynamics of Manifold Piece-wise Linear Systems on Torus
Kazuyuki Kimura, Toshimichi Saito (Hosei Univ.)
pp. 67 - 70

CAS2013-49
[Invited Talk] CSSAL: Charge Sharing Symmetric Adiabatic Logic -- Case Study of Logic Circuit Design and Cryptographic Circuit Design --
Yasuhiro Takahashi, Cancio Monteiro, Toshikazu Sekine (Gifu Univ.)
pp. 71 - 75

CAS2013-50
Operation Verification of Adiabatic Logic in Subthreshold Region
Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ)
pp. 77 - 82

CAS2013-51
Evaluation of Synaptic Weighting Circuit with Pulse-Based Memristor using Adibatic Driving
Haruki Ogata, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ)
pp. 83 - 87

CAS2013-52
LSI Implementation of a Secure Low-Power CSSAL Cellular Multiplier
Cancio Monteiro, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ.)
pp. 89 - 94

CAS2013-53
Properties of an adaptive IIR notch filter using variable step size
Kazunari Doi, Yegui Xiao (Prefectural Univ. Hiroshima), Koji Hasegawa (Hiroshima Tech Institute)
pp. 95 - 100

CAS2013-54
Analysis of hyperchaos bifurcation of four-dimensional manifold piecewise linear systems
Kentaro Yanagisawa, Tadashi Tsubone (Nagaoka Univ. of Tech.)
pp. 101 - 105

CAS2013-55
Nonlinear analysis of DC microgrids with constant-power loads
Keiji Konishi, Yoshiki Sugitani, Naoyuki Hara (Osaka Prefecture Univ.)
pp. 107 - 112

CAS2013-56
State Estimation for Large Scale Nonlinear Systems by using the Covariance Structure Analysis for Multivariate Time Series and Particle Filters
Shozo Tokinaga (Kyushu Univ.), Yoshikazu Ikeda (Univ. of Kitakyushu)
pp. 113 - 118

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan