Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
[TOP] | [2012] | [2013] | [2014] | [2015] | [2016] | [2017] | [2018] | [Japanese] / [English]
CPSY2015-1
Redundant Configuration on FPGA with Rejuvenation for Real Time Applications
Aromhack Saysanasongkham, Satoshi Fukumoto (Tokyo Metropolitan Univ.)
pp. 1 - 6
CPSY2015-2
Off-loading to PEACH2 of Gravitational Calculation
Chiharu Tsuruta, Takuya Kuhara (Keio univ.), Miki Yohei (Univ. of Tsukuba), Hideharu Amano (Keio univ.)
pp. 7 - 12
CPSY2015-3
A Proposal of Time-Lag-Less n-Fault-Tolerant Control System
Hitoshi Iwai
pp. 13 - 18
CPSY2015-4
3D Shared Bus Architecture Using Inductive-Coupling Interconnect
Akio Nomura, Yu Fujita, Hiroki Matsutani, Hideharu Amano (Keio Univ.)
pp. 19 - 24
CPSY2015-5
Design and Implementation of FPGA-based Sorting Accelerator
Ryohei Kobayashi, Kenji Kise (Tokyo Tech)
pp. 25 - 30
CPSY2015-6
An IP-NoC Translator for Connecting NoCs and Internet
Naoaki Kashiwagi, Hiroki Matsutani (Keio Univ.)
pp. 31 - 36
CPSY2015-7
CGRA in Cache for Graph Applications
Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
pp. 37 - 41
CPSY2015-8
A study of processor architecture suited for intelligent sensing system
Hiroki Hihara, Akira Iwasaki (Univ. of Tokyo), Masanori Hashimoto (Osaka Univ./JST CREST), Hiroyuki Ochi (Rits/JST CREST), Yukio Mitsuyama (KUT/JST CREST), Hidetoshi Onodera (Kyoto Univ./JST CREST), Hiroyuki Kanbara (ASTEM/JST CREST), Kazutoshi Wakabayashi, Takashi Takenaka, Takashi Takenaka, Hiromitsu Hada, Munehiro Tada (NEC/JST CREST)
pp. 43 - 48
CPSY2015-9
Near Memory Processing Architecture for High Performance Atypical Applications
Tadahiro Edamoto, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
pp. 49 - 52
CPSY2015-10
Parallel Processor Architecture based on Small World Connection
Hideki Mori (Meiji Univ.), Minoru Uehara, Katsuyoshi Matsumoto (Toyo Univ.)
pp. 53 - 58
CPSY2015-11
[Special Invited Talk]
On Hardware for high-speed pattern matching
Tsutomu Sasao (Meiji Univ.)
pp. 59 - 66
CPSY2015-12
A parallel-operation-oriented FPGA architecture
Takumi Fujimori, Minoru Watanabe (Shizuoka Univ.)
pp. 67 - 70
CPSY2015-13
A Case Study on Prototyping Cloud based IoT devices
Minoru Uehara (Toyo Univ.)
pp. 71 - 76
CPSY2015-14
Frequency Domain aware Power Analysis based on Two Steps Hierarchal Alignment Method
Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.)
pp. 77 - 82
CPSY2015-15
Prototyping of GPS-based Item Finder System
Soichiro Kanagawa, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
pp. 83 - 88
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.