IEICE Technical Report

Online edition: ISSN 2432-6380

Volume 120, Number 211

Hardware Security

Workshop Date : 2020-10-26 / Issue Date : 2020-10-19

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Table of contents

HWS2020-25
Examination of requirements for power side-channel attack resistance evaluation boards of cryptographic integrated circuits -- PDN transfer impedance contributing to leakage strength --
Tomonobu Kan, Kengo Iokibe, Yoshitaka Toyota (Okayama Univ.)
pp. 1 - 6

HWS2020-26
Power Analysis Attack Using Pipeline Scheduling on Pairing Hardware
Mitsufumi Yamazaki, Junichi Sakamoto, Tsutomu Matsumoto (YNU)
pp. 7 - 12

HWS2020-27
Fundamental Evaluation Method of EM Information Leakage Caused by Intentional Electromagnetic Interference -- Impact of Impedance Change in Digital Output Circuits --
Shugo Kaji, Daisuke Fujimoto (NAIST), Masahiro Kinugawa (Univ. of Fukuchiyama), Yuichi Hayashi (NAIST)
pp. 13 - 17

HWS2020-28
Laser-based Attacks on Ultrasonic Sensors
Tatsuya Suehiro, Taku Toyama, Junichi Sakamoto, Tsutomu Matsumoto (Yokohama National Univ.)
pp. 18 - 23

HWS2020-29
Probing Attack on Share-Serial Threshold Implementation of AES
Takeshi Sugawara, Yang Li, Kazuo Sakiyama (UEC)
pp. 24 - 29

HWS2020-30
Feasibility of lattice attacks on ECDSA
Kotaro Abe, Makoto Ikeda (Tokyo Univ.)
pp. 30 - 35

HWS2020-31
Design of Efficient AES Hardware with Immediately Fault Detection Capability
Yusuke Yagyu, Rei Ueno, Naofumi Homma (Tohoku Univ.)
pp. 36 - 41

HWS2020-32
N/A
Kazunari Takasaki (Waseda Univ.), Ryoichi Kida (LAC), Nozomu Togawa (Waseda Univ.)
pp. 42 - 47

HWS2020-33
Security Threats and Preventions for Photonics Computing Model
Junko Takahashi, Koji Chida, Takeshi Sakamoto (NTT)
pp. 48 - 53

HWS2020-34
Domestic Hardware Trojan Research Trends
Shinichi Kawamura, Yu-ich Hayashi (AIST)
pp. 54 - 58

HWS2020-35
Physical-Level Detection Approach against Hardware Trojans inside Semiconductor Chips (II)
Hirofumi Sakane, Shinichi Kawamura, Kentaro Imafuku, Yohei Hori, Makoto Nagata, Yuichi Hayashi, Tsutomu Matsumoto (AIST)
pp. 59 - 64

HWS2020-36
Hardware Trojan using LUT Structure of AI Inference Devices
Yusuke Nozaki, Shu Takemoto, Yoshiya Ikezaki, Masaya Yoshikawa (Meijo Univ.)
pp. 65 - 70

HWS2020-37
Low-Latency Countermeasure Circuit Oriented Hardware Trojan and its Evaluation
Shu Takemoto, Yoshiya Ikezaki, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.)
pp. 71 - 76

HWS2020-38
A Detection Method for Hardware Trojans Inserted into Cryptographic Hardware Netlists
Akira Ito, Rei Ueno, Naofumi Homma (Tohoku Univ.)
pp. 77 - 82

HWS2020-39
N/A
Tatsuki Kurihara, Nozomu Togawa (Waseda Univ.)
pp. 83 - 87

HWS2020-40
N/A
Kohei Nozawa (Waseda Univ.), Kento Hasegawa, Seira Hidano, Shinsaku Kiyomoto (KDDI Research, Inc.), Nozomu Togawa (Waseda Univ.)
pp. 88 - 93

HWS2020-41
Investigation of High-Efficiency Simulation Method for Detection of Physical Design Falsification in Secure IC Chip
Kazuki Yasuda, Kazuki Monta, Daichi Nakagawa, Makoto Nagata (Kobe Univ.)
pp. 94 - 98

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan