IEICE Technical Report

Online edition: ISSN 2432-6380

Volume 121, Number 426

Dependable Computing

Workshop Date : 2022-03-10 - 2022-03-11 / Issue Date : 2022-03-03

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Table of contents

DC2021-79
(See Japanese page.)
pp. 1 - 6

DC2021-80
Study for how to operate cloud storage with high cost performance
Kazuichi Oe, Kento Aida (NII)
pp. 7 - 13

DC2021-81
Implementation and evaluation of decentralized information flow control system using container-based virtualization
Ayato Tachibana, Hidetsugu Irie, Shuichi Sakai (UTokyo)
pp. 14 - 19

DC2021-82
Implementation of an Application Mapping Tool for a Circuit-Switched Multi-FPGA System
Kohei Ito (Keio Univ.), Ryota Yasudo (Kyoto Univ.), Hideharu Amano (Keio Univ.)
pp. 20 - 25

DC2021-83
Compression of configuration data in Scalable Logic Module
Souhei Takagi, Naoya Niwa, Yoshiya Shikama, Yosuke Yanai, Hideharu Amano (Keio Univ), Yuya Nakasato, Daiki Amagasaki, Masahiro Iida (Kumamoto Univ)
pp. 26 - 31

DC2021-84
(See Japanese page.)
pp. 32 - 37

DC2021-85
(See Japanese page.)
pp. 38 - 43

DC2021-86
(See Japanese page.)
pp. 44 - 49

DC2021-87
Evaluation of Cooperative System Architecture Using State Transition Probability Model for Resilient Satellite-based Service Infrastructure
Yuki Tomita, Naohiko Kohtake (Keio Univ.)
pp. 50 - 55

DC2021-88

Wataru Goto, Shingo Yokoyama, Mamoru Ohara, Satoshi Fukumoto (Tokyo Metropolitan Univ.)
pp. 56 - 60

DC2021-89
*
Hiroki Kawaguchi, Itsuki Fujita, Yoshikazu Nagamura (Tokyo Metropolitan Univ.), Masayuki Arai (Nihon Univ.), Satoshi Fukumoto (Tokyo Metropolitan Univ.)
pp. 61 - 66

DC2021-90
A Don't Care Filling Method of Control Signals for Concurrent Logical Fault Testing
Haofeng Xu, Toshinori Hosokawa, Hiroshi Yamazaki, Masayuki Arai (Nihon Univ), Masayoshi Yoshimura (KSU)
pp. 67 - 72

DC2021-91
A Test Generatoin Method to Improve Diagonostic Resolution Based on Fault Sensitization Coverage
Yuya Chida, Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meiji Univ.)
pp. 73 - 78

DC2021-92
LocalMapping Parallelization and CPU Allocation Method on ORB-SLAM3
Kazuki Yamamoto, Takugo Osakabe, Honoka Koike, Tohma Kawasumi, Kazuki Fujita, Toshiaki Kitamura (Waseda Univ.), Akihiro Kawashima, Akira Nodomi (Oscar Tech.), Sadahiro Kimura (NSITEXE,Inc.), Keiji Kimura, Hironori Kasahara (Waseda Univ.)
pp. 79 - 84

DC2021-93
(See Japanese page.)
pp. 85 - 90

DC2021-94
Acceleration of Homomorphic Encryption Library SEAL by Reducing the Number of Arithmetic Bits
Teppei Shishido, Masaki Nishi, Xinyi LI, Keiji Kimura (Waseda Univ.)
pp. 91 - 96

DC2021-95
Performance Evaluation on Auto Tuned MPI Communication
Yao Hu, Shoichi Hirasawa (NII), Takumi Honda, Yusuke Nagasaka, Naoto Fukumoto (FUJITSU), Michihiro Koibuchi (NII)
pp. 97 - 102

DC2021-96
A Study on an Acceleration of Graph-Based SLAM with FPGA
Hajime Takishita, Yuan He, Masaaki Kondo, Hideharu Amano (Keio Univ.n)
pp. 103 - 108

DC2021-97
Imprecise Mixed Criticality Scheduling for SMT Processor
Reo Nagura, Nobuyuki Yamasaki (Keio Univ.)
pp. 109 - 114

DC2021-98
Highly Efficient Mixed Criticality System Using Fluid Scheduling
Kosuke Yashima, Nobuyuki Yamasaki (Keio Univ.)
pp. 115 - 119

DC2021-99
GA-based Software Pipeline Scheduling for CGRAs
Masato Nakagawa, Takuya Kojima, Hideki Takase, Hiroshi Nakamura (UTokyo)
pp. 120 - 125

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan