| Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
| SDM, VLD |
2006-09-25
13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Sensitivity of CMOS Image Sensor and Scaling
YunKyung Kim, Makoto Ikeda, Kunihiro Asada (Univ. of Tokyo) |
CMOS based imagers are beginning to compete aganinst CCDs in many areas of the consumer market because of their system-o... [more] |
VLD2006-34 SDM2006-155
pp.1-5 |
| SDM, VLD |
2006-09-25
13:55 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Peak Power Reduction in LSI by Clock Scheduling
Yosuke Takahashi, Atsushi Takahashi (Tokyo Tech) |
The reduction of peak power consumption of LSI is required to reduce the instability of gate operation, the delay increa... [more] |
VLD2006-35 SDM2006-156
pp.7-12 |
| SDM, VLD |
2006-09-25
14:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
To be announced
Ryo Tanabe, Yoshio Ashizawa, Hideki Oka (Fujitsu Laboratories) |
[more] |
VLD2006-36 SDM2006-157
pp.13-18 |
| SDM, VLD |
2006-09-25
14:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Report on 2006 DAC
-- Low Power Design Methodology --
Shigeru Kuriyama (STARC) |
We report the outline about 43rd Design Automation Conference held in San Francisco on July, 2006. We report brief summa... [more] |
VLD2006-37 SDM2006-158
pp.19-23 |
| SDM, VLD |
2006-09-25
15:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Fellow Memorial Lecture]
To be announced
Hitoshi Kitazawa (Tokyo Univ. of Agriculture and Technology) |
[more] |
VLD2006-38 SDM2006-159
pp.25-30 |
| SDM, VLD |
2006-09-26
10:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A Processor for Genetic Algorithm using Dynamically Reconfigurable Memory
Akihiko Tsukahara, Akinori Kanasugi (Tokyo Denki Univ.) |
This paper proposes a novel processor for genetic algorithm (GA) using dynamically reconfigurable memory. Ingeneral GA, ... [more] |
VLD2006-39 SDM2006-160
pp.1-6 |
| SDM, VLD |
2006-09-26
10:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
To be announced
Yoshio Ashizawa, Hideki Oka (FUJITSU LABORATORIES) |
The density gradient approach is presented to device characteristics analysis with random dopant fluctuations. We invest... [more] |
VLD2006-40 SDM2006-161
pp.7-12 |
| SDM, VLD |
2006-09-26
10:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Global Identification of Variability Factors and Its Application to the Statistical Worst-Case Model Generation
Katsumi Eikyu, Takeshi Okagaki, Motoaki Tanizawa, Kiyoshi Ishikawa, Osamu Tsuchiya (Renesas) |
A novel methodology is presented to generate the worst-case model including extraction of its compact model parameters. ... [more] |
VLD2006-41 SDM2006-162
pp.13-18 |
| SDM, VLD |
2006-09-26
11:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Modeling of Discrete Dopant Effects on Threshold Voltage Shift by Random Telegraph Signal
Ken'ichiro Sonoda, Kiyoshi Ishikawa, Takahisa Eimori, Osamu Tsuchiya (Renesas Technology Corp.) |
This paper discusses the discrete channel dopant effects on the threshold voltage shift by random telegraph signal (RTS)... [more] |
VLD2006-42 SDM2006-163
pp.19-24 |
| SDM, VLD |
2006-09-26
13:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Improvement of Drive Current in Bulk-FinFET using Full 3D Process/Device Simulations
Takahisa Kanemura, Takashi Izumida, Nobutoshi Aoki, Masaki Kondo, Sanae Ito, Toshiyuki Enda, Kimitoshi Okano, Hirohisa Kawasaki, Atsushi Yagishita, Akio Kaneko, Satoshi Inaba, Mitsutoshi Nakamura, Kazunari Ishimaru, Kyoichi Suguro, Kazuhiro Eguchi (Toshiba Corp.) |
We discussed the optimization of structure of bulk-FinFETs and ion implantations by using 3-D process and device simulat... [more] |
VLD2006-43 SDM2006-164
pp.25-29 |
| SDM, VLD |
2006-09-26
13:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
To be announced
Yoshimasa Yoshioka, Yasuhisa Omura (Kansai Univ.) |
[more] |
VLD2006-44 SDM2006-165
pp.31-36 |
| SDM, VLD |
2006-09-26
13:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A Novel Asymmetric Raised Source/Drain Extension Structure for 32nm-node MOSFETs
-- An ultimate planar MOSFET --
Tsutomu Imoto, Yasushi Tateshita, Toshio Kobayashi (SONY) |
A novel asymmetric MOSFET structure is proposed which provides an excellent tradeoff between current drivability and man... [more] |
VLD2006-45 SDM2006-166
pp.37-42 |
| SDM, VLD |
2006-09-26
14:35 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
To be announced
Tsuyoshi Yamamura, Shingo Sato, Yasuhisa Omura (Kansai Univ.) |
[more] |
VLD2006-46 SDM2006-167
pp.43-48 |
| SDM, VLD |
2006-09-26
15:00 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
To be announced
Hideaki Tsuchiya, Kazuya Fujii, Takashi Mori, Tanroku Miyoshi (Kobe Univ.) |
Quasi-ballistic transport is one of the technology boosters for drive current enhancement of Si-MOSFETs. In this paper, ... [more] |
VLD2006-47 SDM2006-168
pp.49-54 |
| SDM, VLD |
2006-09-26
15:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
To be announced
Hideki Minari, Nobuya Mori (Osaka Univ.) |
We have numerically calculated ballistic current in one-dimensional silicon nanostructures with a strained layer using a... [more] |
VLD2006-48 SDM2006-169
pp.55-58 |
| SDM, VLD |
2006-09-26
15:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Quantum Electron Transport Modeling in Nano-Scale Devices Based on Multiband Non-Equilibrium Green's Funtion Method
Helmy Fitriawan, Satofumi Souma, Matsuto Ogawa, Tanroku Miyoshi (Kobe Univ.) |
[more] |
VLD2006-49 SDM2006-170
pp.59-63 |
| SDM, VLD |
2006-09-26
16:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
To be announced
Masami Hane, Takeo Ikezawa, Michihito Kawada (NEC), Tatsuya Ezaki (Hiroshima Univ.), Toyoji Yamamoto (MIRAI-ASET) |
Simulation analysis of channel-orientation effects on strained silicon MOSFETs based on a full-band Monte Carlo method c... [more] |
VLD2006-50 SDM2006-171
pp.65-69 |