Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 10:30 |
Aomori |
|
A Memory Based Filed Programmable Device for Energy saving MCUs Tetsuya Matsumura (Nihon Univ.), Yoshifumi Kawamura (Renesas Electronics), Naoya Okada (Kanazawa Univ.), Kazutami Arimoto (Okayama Prefectual Univ.), Hiroshi Makino (OIT), Yoshio Matsuda (Kanazawa Univ.) VLD2013-46 ICD2013-70 IE2013-46 |
A Field Programmable Sequencer and memory (FPSM), which is an embedded memory based programmable peripherals for Micro C... [more] |
VLD2013-46 ICD2013-70 IE2013-46 pp.1-6 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 10:55 |
Aomori |
|
Proposal of Double-clock and Dual-Edge-Triggered Flip-flops for Asynchronous Circuits Masashi Imai (Hirosaki Univ.), Tomohiro Yoneda (NII) VLD2013-47 ICD2013-71 IE2013-47 |
There are mainly two types of handshaking protocols in asynchronous circuit design; 2-phase handshaking protocol and 4-p... [more] |
VLD2013-47 ICD2013-71 IE2013-47 pp.7-12 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 11:20 |
Aomori |
|
Construction of an Automatic Design Flow for Dual Pipelined Self-Synchronous Circuit Atsushi Ito, Makoto Ikeda (Univ. of Tokyo) VLD2013-48 ICD2013-72 IE2013-48 |
With the down-scaling, circuit which has higher robustness is demanded. Dual-pipeline self synchronous circuit have inhe... [more] |
VLD2013-48 ICD2013-72 IE2013-48 pp.13-18 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 13:00 |
Aomori |
|
[Invited Talk]
Technology Trends and Researches in Video Codec LSI Satoshi Goto (Waseda Univ.) VLD2013-49 ICD2013-73 IE2013-49 |
(To be available after the conference date) [more] |
VLD2013-49 ICD2013-73 IE2013-49 p.19 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 14:20 |
Aomori |
|
[Invited Talk]
Standardization of HEVC/H.265 and a Real-time Encoder Hiroharu Sakate, Nobuaki Motoyama (Mitsubishi Electric) VLD2013-50 ICD2013-74 IE2013-50 |
[more] |
VLD2013-50 ICD2013-74 IE2013-50 p.21 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 15:40 |
Aomori |
|
High Speed Block Motion Estimation (BME) Employing "Picture Frame shaped Search Window (PFSW)" for 8K Ultra High Definition Television (UHDTV) Kentaro Seki, Tadayoshi Enomoto (Chuo Univ.) VLD2013-51 ICD2013-75 IE2013-51 |
[more] |
VLD2013-51 ICD2013-75 IE2013-51 pp.23-28 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 16:05 |
Aomori |
|
A 2.4x-Real-Time VLSI Processor for 60-kWord Continuous Speech Recognition Guangji He, Yuki Miyamoto, Kumpei Matsuda, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ) VLD2013-52 ICD2013-76 IE2013-52 |
This paper describes a low-power VLSI chip for speaker-independent 60-kWord continuous speech recognition based on a co... [more] |
VLD2013-52 ICD2013-76 IE2013-52 pp.29-34 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-07 16:30 |
Aomori |
|
Set Operating Processor (SOP)
-- Application for Image recognition -- Katsumi Inoue (AOT), Duc-Hung Le, Masahiro Sowa, Cong-Kha Pham (UEC) VLD2013-53 ICD2013-77 IE2013-53 |
Abstract The Processing burden of information search such as verification and recognition for conventional processor CPU... [more] |
VLD2013-53 ICD2013-77 IE2013-53 pp.35-40 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 09:00 |
Aomori |
|
A High-Level Synthesis Algorithm with Post-Silicon Delay Tuning for RDR Architectures and its Experimental Evaluations Yuta Hagio, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2013-54 ICD2013-78 IE2013-54 |
As device feature size drops, interconnection delays often exceed gate delays.
We have to incorporate interconnection ... [more] |
VLD2013-54 ICD2013-78 IE2013-54 pp.41-46 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 09:25 |
Aomori |
|
Scan-based attack on the LED block cipher using scan signatures Mika Fujishiro, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2013-55 ICD2013-79 IE2013-55 |
LED (Light Encryption Device) block cipher, one of lightweight block ciphers, is very compact in hardware. Its encryptio... [more] |
VLD2013-55 ICD2013-79 IE2013-55 pp.47-52 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 09:50 |
Aomori |
|
A Bi-Linear Interpolation Unit Using Selector Logics Masashi Shio, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.) VLD2013-56 ICD2013-80 IE2013-56 |
Bi-Linear interpolation is one of interpolation techniques, which interpolates a value linearly from itsfour circumferen... [more] |
VLD2013-56 ICD2013-80 IE2013-56 pp.53-58 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 10:35 |
Aomori |
|
New Architecture for Multiple-Valued Fine-Grain Reconfigurable VLSI Based on Current-Mode Logic Xu Bai, Michitaka Kameyama (Tohoku Univ.) VLD2013-57 ICD2013-81 IE2013-57 |
This article presents a fine-grain reconfigurable VLSI based on multiple-valued X-net data transfer scheme. Two binary d... [more] |
VLD2013-57 ICD2013-81 IE2013-57 pp.59-64 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 11:00 |
Aomori |
|
A Low Supply Voltage, Large "Read" Margin, Six-Transistor CMOS SRAM Employing Adaptively Lowering Word Line Voltage Nobuaki Kobayashi, Tadayoshi Enomoto (Chuo Univ.) VLD2013-58 ICD2013-82 IE2013-58 |
[more] |
VLD2013-58 ICD2013-82 IE2013-58 pp.65-70 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 11:25 |
Aomori |
|
A Delay-Locked Loop with Multi-Level Channel Length Decomposed Programming Delay Elements Yu Zhang, Mingyu Li, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang (Design Algorithm Lab) VLD2013-59 ICD2013-83 IE2013-59 |
Variable delay elements are often used in various types
of high-speed integrated circuits,
mainly intended for delay c... [more] |
VLD2013-59 ICD2013-83 IE2013-59 pp.71-76 |
IE, ICD, VLD, IPSJ-SLDM [detail] |
2013-10-08 11:50 |
Aomori |
|
A 9-bit, 20MS/s SAR ADC with A Design Strategy by Synthesizing Consideration of Layout-Dependent Effects Gong Chen, Mingyu Li, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu), Bo Yang (Design Algorithm Lab) VLD2013-60 ICD2013-84 IE2013-60 |
In nano-scale manufacturing processes of integrated circuits,
a impact of layout-dependent effects (LDEs)
to circuit p... [more] |
VLD2013-60 ICD2013-84 IE2013-60 pp.77-82 |