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Technical Committee on Reconfigurable Systems (RECONF) (Searched in: 2024)
Search Results: Keywords 'from:2024-06-10 to:2024-06-10'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-10 13:45 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
FPGA Implementation of a One-Instruction-Set Computer and Evaluation of Power Consumption Ariya Ochirtsogt, Kenji Kanazawa (Tsukuba Univ.)  CPSY2024-1 DC2024-1 RECONF2024-1 |
[more] | CPSY2024-1 DC2024-1 RECONF2024-1 pp.1-5 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-10 15:15 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Study of control flow decoupling for controller design exploration in CGRA Hisako Ito, Takuya Kojima, Hideki Takase, Hiroshi Namkamura (Univ. of Tokyo) CPSY2024-2 DC2024-2 RECONF2024-2 |
[more] | CPSY2024-2 DC2024-2 RECONF2024-2 pp.6-11 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-10 16:20 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Rapid Inter-Thread Communication Using Message Passing Unit in RISC-V SMT Processor Go Akamatsu, Shogo Takata, Tomoaki Tanaka, Hironori Nakajo (TUAT) CPSY2024-3 DC2024-3 RECONF2024-3 |
In this study, a new inter-thread communication method was implemented on the RISC-V SMT processor with the aim of reduc... [more] | CPSY2024-3 DC2024-3 RECONF2024-3 pp.12-17 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-10 16:45 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Akinobu Tomori, Yasunori Osana (Kumamoto Univ.) CPSY2024-4 DC2024-4 RECONF2024-4 |
[more] | CPSY2024-4 DC2024-4 RECONF2024-4 pp.18-22 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-10 17:10 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
A preliminary report on an FPGA-based prototype of a network switch supporting Asynchronous Traffic Shaping for Time Sensitive Networking Akram Ben Ahmed, Takahiro Hirofuchi, Takaaki Fukai (AIST) CPSY2024-5 DC2024-5 RECONF2024-5 |
Time Sensitive Networking (TSN) is an additional set of new open standards to conventional IEEE 802.3 Ethernet networks ... [more] | CPSY2024-5 DC2024-5 RECONF2024-5 pp.23-29 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 09:30 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Yasuhiko Nakashima (NAIST) CPSY2024-6 DC2024-6 RECONF2024-6 |
(To be available after the conference date) [more] | CPSY2024-6 DC2024-6 RECONF2024-6 pp.30-35 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 09:55 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
A preliminary evaluation of CNNs' performance of meteor detection using training data by generative AI towards FPGA implementation Zheng Yuping, Kenji Kanazawa (Univ. Tsukuba) CPSY2024-7 DC2024-7 RECONF2024-7 |
[more] | CPSY2024-7 DC2024-7 RECONF2024-7 pp.36-39 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 10:45 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Fault classification and prediction of AI accelerators based on activation maximization Ma Shanmou, Kazuteru Namba (Chiba Univ.) CPSY2024-8 DC2024-8 RECONF2024-8 |
This research proposes a method based on neural network interpretability techniques to effectively classify and predict ... [more] | CPSY2024-8 DC2024-8 RECONF2024-8 pp.40-45 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 11:10 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
A LBIST Method for Detecting Fault Locations in AI Accelerators Zhang Jiaxi, Namba Kazuteru (Chiba Univ) CPSY2024-9 DC2024-9 RECONF2024-9 |
In recent years, artificial intelligence (AI) technology has been widely utilized in various fields such as healthcare, ... [more] | CPSY2024-9 DC2024-9 RECONF2024-9 pp.46-51 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 11:35 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Quantitative quality control efforts in FPGA development. Kenji Okazaki, Hiroyuki Uchida (FUJIFILM Software Co., Ltd.) |
[more] | |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 13:15 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Burst Length Optimization in MLC PCM using Encoding and Merge Sort Jin Lei, Kazuteru Namba (Chiba Univ.) CPSY2024-10 DC2024-10 RECONF2024-10 |
In recent years, with the development of fields such as big data, artificial intelligence (AI), and the Internet of Thin... [more] | CPSY2024-10 DC2024-10 RECONF2024-10 pp.52-57 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 13:40 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
CPSY2024-11 DC2024-11 RECONF2024-11 |
(To be available after the conference date) [more] | CPSY2024-11 DC2024-11 RECONF2024-11 pp.58-63 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 15:10 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
A Framework for Efficient Evaluation of Side-Channel Attack Resistance
-- A Case Study of HLS-designed AES -- Takuya Kojima (UTokyo) CPSY2024-12 DC2024-12 RECONF2024-12 |
[more] | CPSY2024-12 DC2024-12 RECONF2024-12 pp.64-69 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 19:00 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
An Example of System Design Using Python (LiteSATA) (Temporary) Ryohei Niwase (Univ. Tsukuba) |
[more] | |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 19:00 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
On the Design and Implementation of Point Cloud-Based Applications with Pynq and High-Level Synthesis Keisuke Sugiura (Keio Univ.) CPSY2024-13 DC2024-13 RECONF2024-13 |
(To be available after the conference date) [more] | CPSY2024-13 DC2024-13 RECONF2024-13 pp.70-72 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-11 19:00 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
An Example of System Design Using Python (LiteX/MigenDSL) (Temporary) Yuji Yamada (Tokyo Tech) |
[more] | |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-12 09:30 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Exploration and Simulation of FPGA Utilizing 3D-SRAM Ryo Takahashi (Tokyo Tech), Hiroki Nakahara (Tohoku Univ.) CPSY2024-14 DC2024-14 RECONF2024-14 |
The performance improvement of integrated circuits (ICs) through techniques such as miniaturization, clock speedup, and ... [more] | CPSY2024-14 DC2024-14 RECONF2024-14 pp.73-78 |
| CPSY, DC, RECONF, IPSJ-ARC [detail] | 2024-06-12 09:55 |
Yamanashi | Isawa View Hotel (Primary: On-site, Secondary: Online) |
Memory-centric CGRA with variable parallelism for neural networks Atsushi Hori, Fumiya Arai, Tetsuya Asai, Kota Ando (Hokkaido Univ.) CPSY2024-15 DC2024-15 RECONF2024-15 |
(To be available after the conference date) [more] | CPSY2024-15 DC2024-15 RECONF2024-15 pp.79-84 |
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