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Special Interest Group on System Architecture (IPSJ-ARC) [schedule] [select]
Chair Tomoaki Tsumura (Nagoya Inst. of Tech.)
Secretary Hiroe Iwasaki (Tokyo Univ. of Agr. and Tech.), Takayuki Ohnishi (NTT), Yasushi Kurihara (Fujitsu), Hayato Yamaki (UEC)

Technical Committee on Computer Systems (CPSY) [schedule] [select]
Chair Kota Nakajima (Fujitsu Lab.)
Vice Chair Yasushi Inoguchi (JAIST), Tomoaki Tsumura (Nagoya Inst. of Tech.)
Secretary Ryohei Kobayashi (Univ. of Tsukuba), Shugo Ogawa (Hitachi)
Assistant Ryuichi Sakamoto (Tokyo Inst. of Tech.), Takumi Honda (Fujitsu)

Technical Committee on Dependable Computing (DC) [schedule] [select]
Chair Toshinori Hosokawa (Nihon Univ.)
Vice Chair Masayuki Arai (Nihon Univ.)
Secretary Hideyuki Ichihara (Hiroshima City Univ.), Mamoru Ohara (TIRI)

Technical Committee on Reconfigurable Systems (RECONF) [schedule] [select]
Chair Yoshiki Yamaguchi (Tsukuba Univ.)
Vice Chair Yasushi Inoguchi (JAIST), Tomonori Izumi (Ritsumeikan Univ.)
Secretary Yutaka Yamada (Toshiba), Yukinori Sato (Toyohashi Univ. of Tech.)
Assistant Yukitaka Takemura (INTEL), Yasunori Osana (Kumamoto Univ.)

Conference Date Wed, Aug 7, 2024 09:00 - 17:00
Thu, Aug 8, 2024 09:00 - 18:40
Fri, Aug 9, 2024 09:00 - 18:40
Topics SWoPP2024: Parallel, Distributed and Cooperative Processing Systems and Dependable Computing 
Conference Place  
Transportation Guide https://kyoubun.or.jp/
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Registration Fee This workshop will be held as the IEICE workshop in fully electronic publishing. Registration fee will be necessary except the speakers and participants other than the participants to workshop(s) in non-electronic publishing. See the registration fee page. We request the registration fee or presentation fee to participants who will attend the workshop(s) on CPSY, DC, RECONF.

Wed, Aug 7 AM 
09:00 - 17:00
  -  
Thu, Aug 8 AM 
09:00 - 10:40
(1) 09:00-09:25  
(2)
DC
09:25-09:50 CPSY2024-16 DC2024-16 RECONF2024-16 Tomoya Aoyama (Tokyo Metro. Univ.), Moe Sugiyama, Masayuki Arai (Nihon Univ.), Satoshi Fukumoto (Tokyo Metro. Univ.)
(3)
DC
09:50-10:15 A Test Pattern Replacement Method to Achieve Both Complete Fault Efficiency and Complete Diagnosis Resolution CPSY2024-17 DC2024-17 RECONF2024-17 Tatsuya Aono, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Koji Yamazaki (Meiji Univ.)
(4)
RECONF
10:15-10:40 Circuit implementation for a radiation-hardened repairable FPGA CPSY2024-18 DC2024-18 RECONF2024-18 Ryota Hosoya, Minoru Watanabe, Nobuya Watanabe (Okayama Univ.)
  10:40-10:55 Break ( 15 min. )
Thu, Aug 8 AM 
10:55 - 11:45
(5)
DC
10:55-11:20 CPSY2024-19 DC2024-19 RECONF2024-19
(6)
CPSY
11:20-11:45 Improving Client-Side Operations in Fully Homomorphic Encryption over the Torus with Single Board Computers CPSY2024-20 DC2024-20 RECONF2024-20 Marin Matsumoto (Ochanomizu Univ.), Ai Nozaki (The Univ. of Tokyo), Arisa Tsuji (Ochanomizu Univ.), Hideki Takase (The Univ. of Tokyo), Masato Oguchi (Ochanomizu Univ.)
  11:45-13:35 Break ( 110 min. )
Thu, Aug 8 PM 
13:35 - 15:15
(7) 13:35-14:00  
(8) 14:00-14:25  
(9)
RECONF
14:25-14:50 Clock distribution method exploiting switching matrices on an optically reconfigured gate array VLSI CPSY2024-21 DC2024-21 RECONF2024-21 Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe (Okayama Univ.)
(10)
RECONF
14:50-15:15 A study of the impact of imbalanced data flows on the RIKEN CGRA CPSY2024-22 DC2024-22 RECONF2024-22 Yasuto Aihara, Takaaki Miyajima (Meiji Univ.), Boma Adhi, Kentaro Sano (RIKEN)
  15:15-15:30 Break ( 15 min. )
Thu, Aug 8 PM 
15:30 - 17:10
(11) 15:30-15:55  
(12)
CPSY
15:55-16:20 Distribution Shift Detection and On-device Fine-tuning of GAT for Edge Devices CPSY2024-23 DC2024-23 RECONF2024-23 Kazuki Nakazawa, Hiroki Matsutani (Keio Univ.)
(13)
CPSY
16:20-16:45 Performance evaluation for directive-based parallelization code at the LLVM IR level CPSY2024-24 DC2024-24 RECONF2024-24 Takumi Yanagida, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.)
(14)
DC
16:45-17:10 X-Filling and Test Scheduling Methods for Concurrent Testing Using Optimistically/Pessimistically Structural Symbolic Simulation CPSY2024-25 DC2024-25 RECONF2024-25 Haruta Tokuta, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.)
  17:10-17:25 Break ( 15 min. )
Thu, Aug 8 PM 
17:25 - 18:40
(15) 17:25-17:50  
(16)
RECONF
17:50-18:15 Basic Evaluation of Throughput and Power Efficiency by Offloading Image Recognition Processing to FPGA CPSY2024-26 DC2024-26 RECONF2024-26 Eisuke Okazaki, Gai Nagahashi (Tokai Univ.), Yanzhi Li, Midori Sugaya (SIT), Takeshi Ohkawa (Kumamoto Univ.), Mikiko Sato (Tokai Univ.)
(17) 18:15-18:40  
Fri, Aug 9 AM 
09:00 - 10:40
(18) 09:00-09:25  
(19)
CPSY
09:25-09:50 Evaluation of Communication Latency in Robot Teleoperation Using Resource Management System for MEC CPSY2024-27 DC2024-27 RECONF2024-27 Gai Nagahashi, Eisuke Okazaki (Tokai Univ.), Li Yanzhi, Midori Sugaya (SIT), Mikiko Sato (Tokai Univ.)
(20)
CPSY
09:50-10:15 An Acceleration Method for Distributed Reinforcement Learning in Edge-Cloud Environments Using Experience Cache CPSY2024-28 DC2024-28 RECONF2024-28 Tomohiro Ojika, Kousei Kudatatsu (Toyama Prefectural Univ.), Hiroki Matsutani (Keio Univ.), Shin Morishima (Toyama Prefectural Univ.)
(21)
RECONF
10:15-10:40 CPSY2024-29 DC2024-29 RECONF2024-29
  10:40-10:55 Break ( 15 min. )
Fri, Aug 9 PM 
10:55 - 12:10
(22)
CPSY
10:55-11:20 Development of a Web-based Programming Education Support System for Collaborative and Simultaneous Use Across Multiple Subjects CPSY2024-30 DC2024-30 RECONF2024-30 Kazuichi OE (NII), Tomoya Saito (Yamaguchi Univ.), Yuko Tsutsui (NII), Tomoya Tanjo (NIG), Jun Nishii, Koichi Okada, Takahiro Tamesue, Yue Wang (Yamaguchi Univ.), Atsuko Takefusa (NII)
(23)
CPSY
11:20-11:45 Improving a Congestion Treatment Method for the D2D Distributed Cooperative Cache CPSY2024-31 DC2024-31 RECONF2024-31 Masashi Miyahara, Celimuge Wu, Tsutomu Yoshinaga (UEC)
(24)
CPSY
11:45-12:10 Enhancing Memory Pool Management for Efficient Data Transfer between Host and Enclave CPSY2024-32 DC2024-32 RECONF2024-32 Jianxuan Ding, Koichiro Kiji, Akihiro Saiki, Keiji Kimura (Waseda Univ.)
  12:10-13:35 Break ( 85 min. )
Fri, Aug 9 AM 
13:35 - 15:15
(25)
CPSY
13:35-14:00 Acceleration of data assimilation for rainfall prediction with co-design of hardware and software CPSY2024-33 DC2024-33 RECONF2024-33 Deshmukh Sameer Satish (Fujitsu), Amemiya Arata (RIKEN), Honda Takumi, Elmon Lang Ian (Fujitsu)
(26)
CPSY
14:00-14:25 A Transaction Processing Method for Approximate Query Processing Engines CPSY2024-34 DC2024-34 RECONF2024-34 Hideyuki Kawashima (Keio Univ.)
(27)
DC
14:25-14:50 Experiment of AI Learning Relations between Technical Sentences and Creating Training Data for Fine-Tuning using Natural Language Processing CPSY2024-35 DC2024-35 RECONF2024-35 Jun Yoshinaga (NALTEC)
(28)
DC
14:50-15:15 CPSY2024-36 DC2024-36 RECONF2024-36
  15:15-15:30 Break ( 15 min. )
Fri, Aug 9 PM 
15:30 - 17:10
(29) 15:30-15:55  
(30) 15:55-16:20  
(31)
CPSY
16:20-16:45 Vlog Resharding for High-Performance Range Query in Key-Value Store CPSY2024-37 DC2024-37 RECONF2024-37 Naoto Sugiura (Keio Univ.), Daichi Fujiki (Titech)
(32)
RECONF
16:45-17:10 Acceleration of Binary128 Matrix Multiplication with Applications by FPGA CPSY2024-38 DC2024-38 RECONF2024-38 Fumiya Kono (SIST), Naohito Nakasato (UoA), Mao Nakata (RIKEN)
  17:10-17:25 Break ( 15 min. )
Fri, Aug 9 PM 
17:25 - 18:40
(33)
DC
17:25-17:50 TMR/DMR adaptive soft-error tolerant redundant system using FPGA cluster CPSY2024-39 DC2024-39 RECONF2024-39 Homu Omura, Kazuteru Namba (Chiba Univ.)
(34)
RECONF
17:50-18:15 CPSY2024-40 DC2024-40 RECONF2024-40
(35)
RECONF
18:15-18:40 A Framework for reducing power consumption of multi-FPGA clusters CPSY2024-41 DC2024-41 RECONF2024-41 Kensuke Iizuka (Keio Univ.), Hideharu Amano (The Univ. of Tokyo)

Announcement for Speakers
General TalkEach speech will have 20 minutes for presentation and 5 minutes for discussion.

Contact Address and Latest Schedule Information
IPSJ-ARC Special Interest Group on System Architecture (IPSJ-ARC)   [Latest Schedule]
Contact Address  
CPSY Technical Committee on Computer Systems (CPSY)   [Latest Schedule]
Contact Address CPSY WEB
https://www.ieice.org/~cpsy/ 
DC Technical Committee on Dependable Computing (DC)   [Latest Schedule]
Contact Address Masayuki Arai (College of Industrial Technology, Nihon Univ.)
E--mail: ain-u 
RECONF Technical Committee on Reconfigurable Systems (RECONF)   [Latest Schedule]
Contact Address Chair: Yoshiki Yamaguchi (Tsukuba Univ.) 
Announcement RECONF website
http://www.ieice.org/~reconf/
RECONF slack
https://join.slack.com/t/reconfworkspace/shared_invite/zt-v3qeynk3-RsInu4wdjqU2t_ysqWvagg


Last modified: 2024-08-03 11:30:57


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