Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ISEC |
2023-05-17 13:30 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Reducing the Number of Shuffles for Secure Multi-input AND Computation with Two Additional Cards Takuto Yoshida (NITIC), Keisuke Nakabayashi, Kodai Tanaka (Tohoku Univ), Eikoh Chida (NITIC), Takaaki Mizuki (Tohoku Univ) ISEC2023-7 |
(To be available after the conference date) [more] |
ISEC2023-7 pp.35-42 |
MW, EST, EMCJ, PEM, IEE-EMC [detail] |
2020-10-23 17:05 |
Online |
Online |
Design of High-frequency Class-D Amplifire hayato takahashi, Yoji Isota, Teruo Tobana, Kohei Akimoto (Akita Pref. Univ.), Masashi Kawakami (NITIC) EMCJ2020-50 MW2020-64 EST2020-52 |
Due to the sophistication and diversification of information and communication networks, the communication speed is incr... [more] |
EMCJ2020-50 MW2020-64 EST2020-52 pp.139-142 |
ITE-HI, IE, ITS, ITE-MMS, ITE-ME, ITE-AIT [detail] |
2020-02-27 11:10 |
Hokkaido |
Hokkaido Univ. (Cancelled but technical report was issued) |
Contrast sensitivity functions measured on luminance-variegated background Misaki Hayasaka (Yamagata Univ.), Takehiro Nagai (Tokyo Tech), Tomoharu Sato (NIT, Ichinoseki College), Tomonori Tashiro, Yasuki Yamauchi (Yamagata Univ.), Ichiro Kuriki (Tohoku Univ.) |
In classical studies, contrast sensitivity functions (CSFs) were measured under full adaptation to a uniform background.... [more] |
|
COMP |
2019-03-18 11:10 |
Tokyo |
The University of Tokyo |
A GPU-based Non-commutative Reduction and Its Applications to Operations for Difference Arrays Atsushi Koike (NIT Ichinoseki), Kunihiko Sadakane (UTokyo) COMP2018-47 |
Reduction is basic operation in parallel computing.It is generalization of summation, in which we can use any associativ... [more] |
COMP2018-47 pp.33-40 |
CPM |
2017-07-21 14:57 |
Hokkaido |
|
Effect of substitution in Ca3Co4O9 on electronic states analyzed by first-principles calculation Daigo Kobayashi (TUT), Satoru Tanibayashi (NIT, Ichinoseki College), Yuichi Nakamura, Hironaga Uchida, Mitsuteru Inoue (TUT) CPM2017-25 |
Layered cobalt oxide Ca3Co4O9 (Co349) is expected to be a good thermoelectric material at high temperature region althou... [more] |
CPM2017-25 pp.21-26 |
COMP |
2017-03-07 10:30 |
Aichi |
Nanzan University |
Development of Peg Solitaire Font Taishi Oikawa (Ichinoseki National College of Tech.), Kazuaki Yamazaki, Tomoko Taniguchi, Ryuhei Uehara (JAIST) COMP2016-50 |
[more] |
COMP2016-50 pp.1-4 |
COMP |
2015-10-02 15:20 |
Tokyo |
|
Efficiency of template matching using the Monte Carlo method Noriaki Hayashizaki, Koji Obokata (NIT, Ichinoseki College) COMP2015-28 |
Template matching is a technique that detects the closest area to the template from the search target image to evaluate ... [more] |
COMP2015-28 pp.35-40 |
COMP |
2015-10-02 15:50 |
Tokyo |
|
An Improvement of Crossover in Assembly of Jigsaw Puzzles Using a GA Kazuyuki Takahashi, Koji Obokata (NIT, Ichinoseki College) COMP2015-29 |
We applied a genetic algorithm to assemble the square piece jigsaw puzzle. We used a gray scale image in the puzzle and ... [more] |
COMP2015-29 pp.41-46 |
ISEC, LOIS, SITE |
2014-11-21 14:15 |
Hyogo |
|
Card-based Generation of Random Permutations without Fixed Points Rie Ishikawa, Eikoh Chida (NIT, Ichinoseki Colleage), Takaaki Mizuki (Tohoku Univ.) ISEC2014-58 SITE2014-49 LOIS2014-28 |
Consider a scenario where there are $n$ players who want to exchange gifts.
That is, we want to generate a random permu... [more] |
ISEC2014-58 SITE2014-49 LOIS2014-28 pp.13-18 |
DC |
2008-10-20 13:30 |
Tokyo |
National Center of Sciences |
Fault-Tolerant Multilayer Neural Networks for Multiple Weight-and-Neuron-Fault Kazuhiro Nishimura (Polytech Univ.), Masato Ootsu (JP Network), Tadayoshi Horita (Polytech Univ.), Itsuo Takanami (Ichinoseki kousen (former)) DC2008-22 |
The architecture of artificial neural networks, which are derived from brain mechanisms, are quite different from ordina... [more] |
DC2008-22 pp.1-6 |
DC |
2008-10-20 13:55 |
Tokyo |
National Center of Sciences |
An implementation of a fault-tolerant 2D systolic array on an FPGA and its evaluation Tadayoshi Horita (Polytechnic Univ.), Itsuo Takanami (Ichinoseki National College of Tech. in former times) DC2008-23 |
A fault-tolerant self-reconfigurable 2D systolic array to calculate matrix multiplications is implemented on an FPGA.
... [more] |
DC2008-23 pp.7-12 |
ISEC, IT, WBS |
2008-02-29 14:55 |
Tokyo |
|
A Construction of Partially Blind Signatures with Traceability Tsunemichi Chiba (Mitsubishi Electric CC), Eikoh Chida (Ichinoseki NCT), Masahiro Mambo (Univ. of Tsukuba), Hiroki Shizuya (Tohoku Univ.) IT2007-59 ISEC2007-156 WBS2007-90 |
In the paper we propose
a construction of partially blind signatures with traceability.
The proposed scheme has two ve... [more] |
IT2007-59 ISEC2007-156 WBS2007-90 pp.73-78 |