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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, HWS, ICD | 2024-03-01 09:20 |
Okinawa | (Primary: On-site, Secondary: Online) |
Kei Nakao, Yukihide Kohira, Hiroshi Saito, Yoichi Tomioka (Univ. of Aizu)  VLD2023-120 HWS2023-80 ICD2023-109 |
(To be available after the conference date) [more] | VLD2023-120 HWS2023-80 ICD2023-109 pp.107-112 |
| EID, ITE-IDY, IEE-EDD, SID-JC, IEIJ-SSL [detail] | 2024-01-26 09:25 |
Kyoto | (Primary: On-site, Secondary: Online) |
Design for micro-LED driving IC Ryoma Matsuno, Zhongzheng Xiao, Rikuto Murayama, Reiji Hattori (Kyushu Univ.) EID2023-13 |
Recent developments in microLED display technology focus on a method that equips each pixel with a single microIC. Minia... [more] | EID2023-13 pp.45-48 |
| HWS, VLD | 2023-03-03 11:00 |
Okinawa | (Primary: On-site, Secondary: Online) |
Yusei Yano, Shinji Nozaki, Tomohide Aizawa, Yukihide Kohira (Univ. of Aizu) VLD2022-103 HWS2022-74 |
(To be available after the conference date) [more] | VLD2022-103 HWS2022-74 pp.161-166 |
| SCE | 2022-08-09 11:00 |
Online | Online | Recursive Cell Placement Method for High-Throughput Single Flux Quantum Logic Circuits Kento Kitamura, Takahiro Kawaguchi, Naofumi Takagi (Kyoto Univ.) SCE2022-4 |
(To be available after the conference date) [more] | SCE2022-4 pp.18-23 |
| KBSE, SC | 2021-11-05 14:20 |
Online | Online + Morioka City (KBSE) (Primary: Online, Secondary: On-site) |
Ikeda Hikaru, Nakagawa Hiroyuki, Sekimoto Fumi, Akagi Hiromasa, Tsuchiya Tatsuhiro () KBSE2021-26 SC2021-25 |
(To be available after the conference date) [more] | KBSE2021-26 SC2021-25 pp.7-12 |
| KBSE | 2020-03-06 13:00 |
Okinawa | Tenbusu-Naha (Cancelled but technical report was issued) |
KBSE2019-46 |
(To be available after the conference date) [more] | KBSE2019-46 pp.1-6 |
| VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 15:20 |
Ehime | Ehime Prefecture Gender Equality Center | A Method of Parallel Computing for Detailed Routing on Ample Areas Yuya Shijo, Kunihiro Fujiyoshi (TUAT) VLD2019-50 DC2019-74 |
There are studies that apply parallel computing to routing problems in LSI design, in order to speed up the routing desi... [more] | VLD2019-50 DC2019-74 pp.179-184 |
| HWS, VLD | 2019-02-27 15:20 |
Okinawa | Okinawa Ken Seinen Kaikan | Design Flow of Circuits with Multiple Supply Voltages for Power Reduction in General-Synchronous Framework Masataka Aoki, Yukihide Kohira (Univ. of Aizu) VLD2018-102 HWS2018-65 |
In general-synchronous framework (g-frame), in which a clock is not assumed to be distributed to all registers simultane... [more] | VLD2018-102 HWS2018-65 pp.55-60 |
| HWS, VLD | 2019-02-28 11:15 |
Okinawa | Okinawa Ken Seinen Kaikan | Implementation Technology for the Advanced Wafer Manufacturing Processes on Optical Transmission LSIs Susumu Hirano, Hideo Yoshida, Kenya Sugihara, Yoshiaki Konishi, Takashi Sugihara, Yoshihiro Ogawa (Mitsubishi Electric) VLD2018-110 HWS2018-73 |
It is indispensable to use the advanced wafer manufacturing processes to develop LSIs of high-speed optical transmission... [more] | VLD2018-110 HWS2018-73 pp.103-108 |
| SC | 2016-11-04 13:20 |
Hyogo | Takigawa Memorial Hall, Kobe Univ. | [Invited Talk]
Introduction of Service Engineering and Implementation in Restaurant Business Nobutada Fujii (Kobe Univ.) SC2016-23 |
New research area, Service Science / Engineering, is at present under vivid discussion to realize servitization of manuf... [more] | SC2016-23 pp.23-28 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:25 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | Routability-oriented Common-Centroid Capacitor Array Generation Jing Li, Bo Yang (Design Algorithm Lab.), Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2012-89 DC2012-55 |
We address layout generation of on-chip matched capacitors with the high relative accuracy. Unit capacitors are placed i... [more] | VLD2012-89 DC2012-55 pp.171-175 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-29 13:00 |
Miyazaki | NewWelCity Miyazaki | Layout Methodology for Self-Alinged Double Patterning Chikaaki Kodama, Koichi Nakayama, Toshiya Kotani, Shigeki Nojima, Shoji Mimotogi, Shinji Miyamoto (Toshiba) VLD2011-76 DC2011-52 |
We propose a new layout method for the damascene process of self-aligned double patterning (SADP). In this method, w... [more] |
VLD2011-76 DC2011-52 pp.141-146 |
| CAS, MSS, VLD, SIP | 2010-06-21 11:40 |
Hokkaido | Kitami Institute of Technology | Layout-Aware Variation Modeling and Its Application to Opamp Design Kouta Shinohara, Mihoko Hidaka, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) CAS2010-7 VLD2010-17 SIP2010-28 CST2010-7 |
As geometrical scaling of the transistor dimensions, such as feature size and supply voltage, has dominated the semicon... [more] |
CAS2010-7 VLD2010-17 SIP2010-28 CST2010-7 pp.37-41 |
| VLD, ICD, DC, IPSJ-SLDM | 2005-11-30 13:30 |
Fukuoka | Kitakyushu International Conference Center | [Fellow Memorial Lecture]
Layout CAD and DFM
-- Beginning and Maturity -- Takashi Mitsuhashi (Cadence Japan) |
The auther had an opportunity to be engaged in development of VLSI layout design automation, and automation of design ve... [more] | VLD2005-54 ICD2005-149 DC2005-31 pp.1-6 |
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