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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2015-06-16
14:10
Tokyo Kikai-Shinko-Kaikan Bldg. A test data reduction method based on scan slice on BAST
Makoto Nishikiori, Hiroshi Yamazaki, Toshinori Hosokawa, Masayuki Arai (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) DC2015-16
BAST is one of techniques to reduce the amount of test data while maintaining high test quality by combining built-in se... [more] DC2015-16
pp.1-6
DC 2014-02-10
15:10
Tokyo Kikai-Shinko-Kaikan Bldg. A reduction method of shift data volume on BAST
Marika Tanaka, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ), Masayuki Arai (Nihon Univ) DC2013-87
BAST is one of techniques to reduce the amount of test data while maintaining the high test quality using built-in self ... [more] DC2013-87
pp.49-54
DC 2014-02-10
15:35
Tokyo Kikai-Shinko-Kaikan Bldg. Test Data Reduction Method for BIST-Aided Scan Test by Controlling Scan Shift and Partial Reset of Inverter Code
Ryota Mori, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) DC2013-88
BIST-aided scan test (BAST) has been proposed as one of the techniques that enhances scan-based BIST. The BAST architect... [more] DC2013-88
pp.55-60
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2013-11-28
14:10
Kagoshima   An inverter block construction method to reduce test data volume on BAST
Marika Tanaka, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ), Masayoshi Yoshimura (Kyushu Univ), Masayuki Arai (Nihon Univ), Michinobu Nakao (Yomiuri Institute) VLD2013-85 DC2013-51
BAST is one of technique to reduce the amount of test data while maintaining the high test quality using built-in self t... [more] VLD2013-85 DC2013-51
pp.171-176
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-29
09:50
Miyazaki NewWelCity Miyazaki A Scan Chain Construction Method to Reduce Test Data Volume on BAST
Yun Chen, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ.) VLD2011-73 DC2011-49
BAST is one of techniques which are combined ATPG and BIST to reduce the amount of test data while maintaining the high ... [more] VLD2011-73 DC2011-49
pp.127-132
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2011-11-29
10:15
Miyazaki NewWelCity Miyazaki A BIST-Aided Scan Test using Shifting Inverter Code and a TPG Method for Test Data Reduction
Yasuhiko Okada, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) VLD2011-74 DC2011-50
BIST-aided scan test (BAST) has been proposed as one of the techniques that enhance scan-based BIST.The BAST architectur... [more] VLD2011-74 DC2011-50
pp.133-138
DC 2010-06-25
15:15
Tokyo Kikai-Shinko-Kaikan Bldg. A test pattern matching method on BAST architecture using don't care identification for the detection of random pattern resistant faults
Yun Chen, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ.) DC2010-11
BAST is one of techniques which are combined ATPG and BIST to reduce the amount of test data while maintaining the high ... [more] DC2010-11
pp.19-24
DC 2009-02-16
15:20
Tokyo   A Method to Increase the Number of Don't care based on Easy- To-Detected Faults -- Application for BAST Architecture --
LingLing Wan (Graduate Schoo of Nihon Univ.), Motohiro Wakazono (Graduate School of Nihon Univ.), Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ.) DC2008-76
The BIST Aided Scan Test (BAST) is a technique that combines the
automatic test pattern generator (ATPG) and the Built-... [more]
DC2008-76
pp.49-54
 Results 1 - 8 of 8  /   
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