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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
LOIS, ICM |
2014-01-17 13:35 |
Nagasaki |
Nagasaki Museum of History and Culture |
Implementation of an Air-blowing Function for the Virtual Stamp Rally System Using Exercise Bikes Syuichi Kikawa, Jun Otani, Shoji Mizobuchi (Kinki Univ) ICM2013-46 LOIS2013-50 |
Developing the virtual stamp rally system for improving the utilization of the exercise bike. Virtual stamp rally can be... [more] |
ICM2013-46 LOIS2013-50 pp.65-68 |
LOIS, ICM |
2014-01-17 14:00 |
Nagasaki |
Nagasaki Museum of History and Culture |
Development of Virtual Stamp Rally System That Promotes Intrinsic Motivation for Use of Exercise Bikes Jun Otani, Syuichi Kikawa, Shoji Mizobuchi (Kinki Univ.) ICM2013-47 LOIS2013-51 |
Be placed in sports facilities as an instrument for preventing lifestyle-related diseases often Excercise Bikes. However... [more] |
ICM2013-47 LOIS2013-51 pp.69-74 |
ICD |
2007-04-12 10:00 |
Oita |
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A high-density 1T-4MTJ MRAM with Self-Reference Sensing Scheme Yasumitsu Murai, Hiroaki Tanizaki (Renesas Design), Takaharu Tsuji, Jun Otani, Yuichiro Yamaguchi, Haruo Furuta, Shuichi Ueno, Tsukasa Oishi, Masanori Hayashikoshi, Hideto Hidaka (Renesas) ICD2007-3 |
A high-density memory cell named 1-Transistor 4-Magnetic Tunnel Junction (1T-4MTJ) has been proposed for Magnetic Random... [more] |
ICD2007-3 pp.13-16 |
ICD |
2005-04-15 10:30 |
Fukuoka |
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A 1.2V 1Mbit Embedded MRAM Core with Folded Bit-Line Array Architecture Takaharu Tsuji (Renesas Technorogy), Hiroaki Tanizaki (Renesas Device Design), Masatoshi Ishikawa, Jun Otani, Yuichiro Yamaguchi, Shuichi Ueno, Tsukasa Oishi, Hideto Hidaka (Renesas Technorogy) |
A 1Mbit MRAM with a 0.81um2 1-Transistor 1-Magnetic Tunnel Junction (1T-1MTJ) cell using 0.13um 4LM logic technology has... [more] |
ICD2005-13 pp.1-6 |
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