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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF, VLD | 2024-01-29 11:45 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
 VLD2023-83 RECONF2023-86 |
(To be available after the conference date) [more] | VLD2023-83 RECONF2023-86 pp.19-23 |
| RECONF, VLD | 2024-01-29 13:30 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
[Invited Talk]
Role of FPGAs in Quantum Network Architectures Fumiaki Mizuno (Keio Univ.) VLD2023-84 RECONF2023-87 |
In recent years, quantum computers have garnered significant attention due to their ability to rapidly process problems ... [more] | VLD2023-84 RECONF2023-87 pp.24-30 |
| RECONF, VLD | 2024-01-29 15:55 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
VLD2023-88 RECONF2023-91 |
Quantum computer simulation is indispensable for quantum algorithm research since the results of real quantum computers... [more] |
VLD2023-88 RECONF2023-91 pp.47-52 |
| RECONF, VLD | 2024-01-30 14:25 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
Exploration of Acceleration of FPGA-based Linear Equation Solver using Approximate Division in Electronic Circuit Simulator Naoki Kakine, Shuto Yuya, Tetsuo Hironaka, Atsushi Kubota (HCU) VLD2023-96 RECONF2023-99 |
(To be available after the conference date) [more] | VLD2023-96 RECONF2023-99 pp.93-98 |
| RECONF, VLD | 2024-01-30 14:50 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
FPGA-Accelerated Random Forest for Real-Time IoT Intrusion Detection Qingyu Zeng, Yuko Hara (Tokyo Tech) VLD2023-97 RECONF2023-100 |
The rapid proliferation of the Internet of Things (IoT) has heightened cyber security concerns, necessitating efficient ... [more] | VLD2023-97 RECONF2023-100 pp.99-104 |
| ICTSSL, CAS | 2024-01-25 11:00 |
Kanagawa | (Primary: On-site, Secondary: Online) |
Performance effect of memory access pattern for high-level synthesized sprite drawing hardware Yuka Otani, Akira Yamawaki (Kyutech) CAS2023-85 ICTSSL2023-38 |
We are developing a sprite drawing hardware suitable for high-level synthesis. Sprite drawing stores the sprite image in... [more] | CAS2023-85 ICTSSL2023-38 pp.17-22 |
| ED, MWPTHz | 2023-12-21 17:35 |
Miyagi | RIEC, Tohoku Univ. (Primary: On-site, Secondary: Online) |
Characterization of high-speed wavelength switching of wavelength tunable laser and its applicability to optical switches Ryo Matsumoto, Naoto Masutomi, Ryota Kaide, Yuya Mikami (Kyushu Univ.), Yuta Ueda (NTT), Kazutoshi Kato (Kyushu Univ.) ED2023-58 MWPTHz2023-68 |
With the rapid increase in communication traffic in recent years, high-speed optical switches are required for optical c... [more] | ED2023-58 MWPTHz2023-68 pp.25-28 |
| SIS | 2023-12-07 11:00 |
Aichi | Sakurayama Campus, Nagoya City University (Primary: On-site, Secondary: Online) |
Data Path Parallelization to Improve Performance of High-level Synthesized Sprite Drawing Hardware Yuka Otani, Akira Yamawaki (Kyutech) SIS2023-24 |
A mobile terminal architecture which can dynamically reconfigure the optimal hardware for each application can achieve h... [more] | SIS2023-24 pp.1-6 |
| SIS | 2023-12-07 11:20 |
Aichi | Sakurayama Campus, Nagoya City University (Primary: On-site, Secondary: Online) |
Development of a real-time non-photorealistic rendering system with a high-level synthesized pencil drawing style image conversion hardware Honoka Tani, Akira Yamawaki (Kyutech) SIS2023-25 |
We developed non-photorealistic rendering (NPR) libraries optimized for high-level synthesis (HLS) technology that autom... [more] | SIS2023-25 pp.7-12 |
| SANE | 2023-12-08 15:30 |
Overseas | Surakarta, Indonesia (Primary: On-site, Secondary: Online) |
Development of Reconfigurable NLFM Chirp Generator using FPGA Muhammad Hamka Ibrahim, Subuh Pramono (UNS), Josaphat Tetuko Sri Sumantyo (Chiba Univ) SANE2023-88 |
Nonlinear frequency modulation (NLFM) has advantages of suppressing the sidelobes. In this paper, the development of NLF... [more] | SANE2023-88 pp.153-155 |
| NLP | 2023-11-29 14:15 |
Okinawa | Nago city commerce and industry association | Reproduction of nonlinear dynamics of asthma delay model using ergodic sequential logic and efficient FPGA implementation Isaki Yamamoto, Hiroyuki Torikai (Hosei Univ.) NLP2023-77 |
Lipopolysaccharides (LPS) present in the air and other media act as endotoxins when they enter blood vessels. Depending ... [more] | NLP2023-77 p.74 |
| NLP | 2023-11-29 16:10 |
Okinawa | Nago city commerce and industry association | Stochastic Digital Cochlea Model for Mimicking Fundamental Characteristics of Mammalian Cochlea Sone Koki, Torikai Hiroyuki (Hosei Univ.) NLP2023-81 |
This paper introduces a stochastic digital cochlear model. The study demonstrates that the model is capable of mimicking... [more] | NLP2023-81 p.89 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-15 15:30 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
* Itsuki Akeno, Hiro Yamazaki, Tetsuya Asai, Kota Ando (Hokkaido Univ) VLD2023-41 ICD2023-49 DC2023-48 RECONF2023-44 |
We propose a processor architecture for neural network (NN) training in edge and prototype it on an FPGA (Field--Program... [more] | VLD2023-41 ICD2023-49 DC2023-48 RECONF2023-44 pp.64-69 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-16 13:45 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
A Proposal for Acceleration of FPGA-based Linear Equation Solver using Speculative Execution System Naoki Kakine, Shuto Yuya, Atsushi Kubota, Tetsuo Hironaka (HCU) VLD2023-53 ICD2023-61 DC2023-60 RECONF2023-56 |
(To be available after the conference date) [more] | VLD2023-53 ICD2023-61 DC2023-60 RECONF2023-56 pp.119-124 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-16 14:10 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
Hardware obfuscation method using Obfuscator-LLVM and Bambu Mikiya Ogura, Shuichi Ichikawa (Toyohashi Univ. Tech.) VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57 |
Hardware obfuscation serves as a countermeasure against hardware reverse engineering. Yamada et al. employed the OLLVM s... [more] | VLD2023-54 ICD2023-62 DC2023-61 RECONF2023-57 pp.125-130 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-17 14:10 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
Configuration Data Compression for SLM Fine-grained Reconfigurable Logic Souhei Takagi, Takuya Kozima, Hideharu Amano (Keio Univ), Morihiro Kuga, Masahiro Iida (Kumamoto Univ) VLD2023-72 ICD2023-80 DC2023-79 RECONF2023-75 |
SLM (Scalable Logic Module) is a fine-grained reconfigurable logic developed by Kumamoto University, characterized by it... [more] | VLD2023-72 ICD2023-80 DC2023-79 RECONF2023-75 pp.215-220 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-17 14:50 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
Hardware Compression Method Applying Bernoulli Approximation for Bayesian Neural Networks Taisei Saito, Kota Ando, Tetsuya Asai (Hokkaido Univ.) VLD2023-73 ICD2023-81 DC2023-80 RECONF2023-76 |
This study focuses on efficiently lightweighting Bayesian deep learning algorithms and implementing them on FPGA. It com... [more] | VLD2023-73 ICD2023-81 DC2023-80 RECONF2023-76 pp.221-226 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2023-11-17 15:40 |
Kumamoto | Civic Auditorium Sears Home Yume Hall (Primary: On-site, Secondary: Online) |
High-Level Synthesis Implementation of a Reservoir Computing based on Chaotic Boltzmann Machine
-- Improving scalability and efficiency of sparse matrix multiplication through a dedicated data compression in external memory -- Shigeki Matsumoto, Yuki Ichikawa, Nobuki Kajihara (IVIS), Hakaru Tamukoh (kyutech) VLD2023-75 ICD2023-83 DC2023-82 RECONF2023-78 |
This paper reports on an FPGA implementation of Chaotic Boltzmann Machine Reservoir Computing (CBM-RC). The reservoir wi... [more] | VLD2023-75 ICD2023-83 DC2023-82 RECONF2023-78 pp.231-236 |
| SANE | 2023-11-13 13:05 |
Chiba | Chiba Univ. (Nishi-Chiba Campus) (Primary: On-site, Secondary: Online) |
Board design of digital chirp generator using FPGA Yoshiaki Saito, Kazuteru Namba, Josaphat Tetuko Sri Sumantyo (Chiba Univ.) SANE2023-52 |
Remote sensing, which enables observation of an object without touching it, has been widely used for earth observation i... [more] | SANE2023-52 pp.28-33 |
| ICD, HWS | 2023-10-31 14:20 |
Mie | (Primary: On-site, Secondary: Online) |
Evaluation of Time-to-Digital Converter in Laser Fault Injection Detection on FPGA Shungo Hayashi, Junichi Sakamoto (YNU/AIST), Masaki Chikano, Tsutomu Matsumoto (YNU) HWS2023-56 ICD2023-35 |
Fault injection attacks are attacks that intentionally introduce faults into a running device in order to expose interna... [more] | HWS2023-56 ICD2023-35 pp.10-15 |
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