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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SDM | 2024-01-31 12:35 |
Tokyo | KIT Toranomon Graduate School (Primary: On-site, Secondary: Online) |
[Invited Talk]
Milli-Kelvin Analysis Revealing the Role of Band-edge States in Cryogenic MOSFETs Hiroshi Oka, Hidehiro Asai, Takumi Inaba, Shunsuke Shitakata, Hitoshi Yui, Hiroshi Fuketa, Shota Iizuka, Kimihiko Kato, Takashi Nakayama, Takahiro Mori (AIST)  SDM2023-74 |
Toward large-scale quantum computers, cryogenic CMOS circuits have been developed to control and readout the qubits insi... [more] | SDM2023-74 pp.1-4 |
| SDM | 2019-01-29 09:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Multidomain Dynamics of Ferroelectric Polarization in Negative Capacitance State and its Impacts on Performances of Field-Effect Transistors Hiroyuki Ota, Tsutomu Ikegami, Koichi Fukuda, Junichi HattoriI, Hidehiro Asai, Kazuhiko Endo, Shinji Migita (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2018-81 |
In this paper, we clarified the multidomain dynamics of ferroelectric polarization in the Negative Capacitance Field-Eff... [more] | SDM2018-81 pp.1-4 |
| SDM | 2019-01-29 09:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Assessment of Steep-Subthreshold Swing Behaviors in Ferroelectric Field-Effect Transistors Shinji Migita, Hiroyuki Ota (AIST), Akira Thorium (U. Tokyo) SDM2018-82 |
Steep-subthreshold swing (steep-SS) behaviors are observable in recent ferroelectric-gate field-effect transistors (FE-F... [more] | SDM2018-82 pp.5-8 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 12:45 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | 2-step Charge Pump Voltage Booster Circuit for Micro Energy Harvesting Tomoya Kimura, Hiroyuki ochi (Ritsumeikan Univ.) VLD2016-46 DC2016-40 |
This report proposes L1L5-type 2-step charge pump circuit that is suitable for boosting efficiently the subthreshold inp... [more] | VLD2016-46 DC2016-40 pp.13-18 |
| SDM | 2016-06-29 10:40 |
Tokyo | Campus Innovation Center Tokyo | [Invited Lecture]
Design of SOI-FETs for Steep Slope Switching using Negative Capacitance in Ferroelectric Gate Insulators Hiroyuki Ota, Shinji Migita, Junichi Hattori, Koichi Fukuda (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2016-34 |
This paper discusses a design of fully depleted silicon-on-insulator field-effect transistors with ferroelectric gate in... [more] | SDM2016-34 pp.9-13 |
| SDM, ED (Workshop) |
2012-06-27 13:15 |
Okinawa | Okinawa Seinen-kaikan | Investigation and Optimization of the n-channel and p-channel L-shaped Tunneling Field-Effect Transistors Sang Wan Kim (Seoul National Univ.), Woo Young Choi (Sogang Univ.), Min-Chul Sun, Hyun Woo Kim, Byung-Gook Park (Seoul National Univ.) |
Tunneling field-effect transistors (TFETs) have been regarded as next-generation ultra-low power devices thanks to low o... [more] | |
| VLD | 2009-03-13 11:05 |
Okinawa | Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in Subthreshold Circuits Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye (Osaka Univ./JST-CREST) VLD2008-160 |
This paper presents modeling of manufacturing variability and body bias effect for subthreshold circuits based on mea... [more] |
VLD2008-160 pp.201-206 |
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