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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| MSS, NLP (Joint) |
2018-03-13 14:55 |
Osaka | Deductive Verification of real-time safety properties for embedded assembly program using theorem prover Princess Naoki Odajima (Kanazawa Univ.), Gakuhi Fukuda (Kanazawa Nishikigaoka), Satoshi Yamane (Kanazawa Univ.)  MSS2017-84 |
It is important to verify both the correctness and real-time properties for embedded systems. In this paper, we propos... [more] |
MSS2017-84 pp.35-40 |
|
| SIP, CAS, MSS, VLD | 2017-06-20 09:30 |
Niigata | Niigata University, Ikarashi Campus | Deductive Verification Method of real-time safety properties for embedded assembly program
-- □≦TIME q = □(q∧(time≦TIME)) -- Satoshi Yamane (Kanazawa Univ.) CAS2017-12 VLD2017-15 SIP2017-36 MSS2017-12 |
It is important to verify both the correctness and real-time properties for embedded systems. In this paper, we propos... [more] |
CAS2017-12 VLD2017-15 SIP2017-36 MSS2017-12 pp.59-64 |
| MSS | 2017-03-16 11:20 |
Shimane | Shimane Univ. | Verification Methods of real-time properties for embedded assembly program
-- Model checking and deductive verification for embedded program -- Satoshi Yamane (Kanazawa Univ.) MSS2016-83 |
It is important to verify both the correctness and real-time properties for embedded systems. In this paper, we propos... [more] |
MSS2016-83 pp.11-16 |
| CPSY, RECONF, VLD, IPSJ-SLDM, IPSJ-ARC [detail] | 2017-01-25 10:15 |
Kanagawa | Hiyoshi Campus, Keio Univ. | MTJ-based Nonvolatile Flip-Flop Circuit Enabling to Verify Stored Data Junya Akaike, Kimiyoshi Usami (SIT) VLD2016-97 CPSY2016-133 RECONF2016-78 |
With the spread of portable devices in recent year, products with high performance and low power consumption are require... [more] | VLD2016-97 CPSY2016-133 RECONF2016-78 pp.175-180 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
Performance Evaluation of Storage Class Memory based SSD in Consideration of Reliability Yutaka Adachi, Hirofumi Takishita, Ken Takeuchi (Chuo Univ.) ICD2016-68 CPSY2016-74 |
The future Storage Class Memory (SCM) is equivalent to NAND Flash in terms of cost. SCM is high performance compared wit... [more] | ICD2016-68 CPSY2016-74 p.55 |
| US | 2016-06-10 16:10 |
Toyama | Gofuku Campus, University of Toyama | Doppler effects of when sound speed and sea current vary with propagation Part 2
-- Experimental results for verifing the derived proposed Dopller shift equation -- Shokichi Tanaka (JRC/UEC), Tomoo Kamakura, Hideyuki Nomura (UEC) US2016-28 |
In the previous paper, the equations of Doppler shift by taking account of the sound speed and sea current that are depe... [more] | US2016-28 pp.47-52 |
| ICD | 2013-04-11 11:40 |
Ibaraki | Advanced Industrial Science and Technology (AIST) | [Invited Talk]
Filament Scaling Forming Technique and Level-Verify-Write Scheme with Endurance Over 10 million Cycles in ReRAM Akifumi Kawahara, Ken Kawai, Yuuichirou Ikeda, Yoshikazu Katoh, Ryotaro Azuma, Yuhei Yoshimoto, Kouhei Tanabe, Zhiqiang Wei, Takeki Ninomiya, Koji Katayama, Shunsaku Muraoka, Atsushi Himeno, Kazuhiko Shimakawa, Takeshi Takagi, Kunitoshi Aono (Panasonic) ICD2013-4 |
Endurance characteristics over 10 million cycles almost 10 times higher as existing, and the small filament for leading ... [more] | ICD2013-4 pp.15-20 |
| ICD | 2012-12-17 15:55 |
Tokyo | Tokyo Tech Front | [Poster Presentation]
3x Write and 5x Read Speed Increase for RRAM with Disturb Free Bipolar Operation Sheyang Ning (Chuo Univ./Univ. of Tokyo), Tomoko Ogura Iwasaki, Ken Takeuchi (Chuo Univ.) ICD2012-99 |
The RRAM high speed operation is handicapped by the need to verify during set/reset, and the limited read voltage for re... [more] | ICD2012-99 p.43 |
| ICD | 2011-12-15 16:10 |
Osaka | [Poster Presentation]
Endurance enhancement programming method for 50nm resistive random access memory (ReRAM) Kazuhide Higuchi, Kousuke Miyaji, Koh Johguchi, Ken Takeuchi (Univ. of Tokyo) ICD2011-116 |
Resistive memory is the promising candidate for sub-20nm nonvolatile memory owing to low switching current, high scalabi... [more] | ICD2011-116 pp.75-80 |
|
| ICD | 2006-04-14 14:45 |
Oita | Oita University | An Internal Voltage Generation System of Flash Memory Module Jiro Ishikawa, Toshihiro Tanaka, Akira Kato, Takashi Yamaki, Yukiko Umemoto, Takeshi Shimozato, Isao Nakamura, Yutaka Shinagawa (Renesas Technology Corp.) |
We present a new internal voltage generation system of flash memory module embedded in a microcontroller. One of the fea... [more] | ICD2006-20 pp.109-113 |
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