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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD |
2017-04-21 10:25 |
Tokyo |
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[Invited Lecture]
A 6.05-Mb/mm2 16-nm FinFET Double Pumping 1W1R 2-port SRAM with 313ps Read Access Time Yohei Sawada, Makoto Yabuuchi, Masao Morimoto (REL), Toshiaki Sano (RSD), Yuichiro Ishii, Shinji Tanaka (REL), Miki Tanaka (RSD), Koji Nii (REL) ICD2017-12 |
[more] |
ICD2017-12 pp.63-65 |
ICD, CPM, ED, EID, EMD, MRIS, OME, SCE, SDM, QIT (Joint) [detail] |
2017-01-31 15:25 |
Hiroshima |
Miyajima-Morino-Yado(Hiroshima) |
A 5.92-Mb/mm2 28-nm Pseudo 2-Read/Write Dual-Port SRAM Using Double Pumping Circuitry Yuichiro Ishii, Makoto Yabuuchi, Yohei Sawada, Masao Morimoto, Yasumasa Tsukamoto (Renesas Electronics), Yuta Yoshida, Ken Shibata, Toshiaki Sano (Renesas System Design), Shinji Tanaka, Koji Nii (Renesas Electronics) EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98 |
We propose pseudo dual-port (DP) SRAM by using 6T single-port (SP) SRAM bitcell with double pumping circuitry, which ena... [more] |
EMD2016-86 MR2016-58 SCE2016-64 EID2016-65 ED2016-129 CPM2016-130 SDM2016-129 ICD2016-117 OME2016-98 pp.87-92 |
ICD |
2015-04-16 13:25 |
Nagano |
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[Invited Lecture]
A 512-kb 1-GHz 28-nm Partially Write Assisted Dual-Port SRAM with Self Adjustable Negative Bias Bitline Shinji Tanaka (Renesas Electronics), Yuichiro Ishii, Makoto Yabuuchi (Renesas), Toshiaki Sano (Renesas System Design), Koji Tanaka, Yasumasa Tsukamoto, Koji Nii, Hirotoshi Sato (Renesas) ICD2015-2 |
[more] |
ICD2015-2 pp.5-8 |
ICD, SDM |
2008-07-17 15:05 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
A Fully Logic-Process-Compatible, SESO-memory Cell with 0.1-FIT/Mb Soft Error, 100-MHz Random Cycle, and 100-ms Retention Norifumi Kameshiro, Takao Watanabe, Tomoyuki Ishii, Toshiyuki Mine (Hitachi, Ltd.), Toshiaki Sano (Renesas), Hidefumi Ibe, Satoru Akiyama (Hitachi, Ltd.), Kazumasa Yanagisawa, Takashi Ipposhi, Toshiaki Iwamatsu, Yasuhiko Takahashi (Renesas) SDM2008-136 ICD2008-46 |
We proposed a fully logic compatible process for a single electron shut-off transistor (SESO). A 1-kb memory-cell array ... [more] |
SDM2008-136 ICD2008-46 pp.47-52 |
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