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| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SDM, ICD, ITE-IST [detail] | 2023-08-02 09:00 |
Hokkaido | Hokkaido Univ. Multimedia Education Bldg. 3F (Primary: On-site, Secondary: Online) |
[Invited Talk]
A 33kDMIPS 6.4W Vehicle Communication Gateway Processor Achieving 10Gbps/W Network Routing, 40ms CAN Bus Start-Up and 1.4mW Standby Kenichi Shimada, Keiichiro Sano, Kazuki Fukuoka, Hiroshi Morita, Masayuki Daito, Tatsuya Kamei, Hiroyuki Hamasaki, Yasuhisa Shimazaki (Renesas)  SDM2023-43 ICD2023-22 |
[more] | SDM2023-43 ICD2023-22 pp.36-40 |
| SDM, ICD, ITE-IST [detail] | 2021-08-18 13:00 |
Online | Online | [Invited Talk]
A 12nm autonomous driving processor running 60.4 TOPS and 13.8 TOPS/W CNNs with task-separated ASIL D control Katsushige Matsubara, Lieske Hanno (Renesas Electronics), Motoki Kimura (Renesas Electronics Europe), Atsushi Nakamura, Manabu Koike, Kazuaki Terashima, Shun Morikawa, Yoshihiko Hotta, Takahiro Irita, Seiji Mochizuki, Hiroyuki Hamasaki, Tatsuya Kamei (Renesas Electronics) SDM2021-39 ICD2021-10 |
Next-generation driver assistance systems and automated driving systems require both high performances to realize enormo... [more] | SDM2021-39 ICD2021-10 pp.48-53 |
| ICD, CPSY, CAS | 2017-12-14 15:10 |
Okinawa | Art Hotel Ishigakijima | Accelerated Transient Analysis of Power MOSFETs by the Matrix Exponential Method Tatsuya Kamei, Shigetaka Kumashiro, Kazutoshi Kobayashi (KIT) CAS2017-87 ICD2017-75 CPSY2017-84 |
In designing and developing power devices, reduction of simulation time is required. In this study, an accurate metric f... [more] | CAS2017-87 ICD2017-75 CPSY2017-84 pp.107-112 |
| SDM | 2017-11-10 14:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
An Accurate Metric to Control Time Step of Transient Device Simulation by Matrix Exponential Method Shigetaka Kumashiro, Tatsuya Kamei, Akira Hiroki, Kazutoshi Kobayashi (KIT) SDM2017-70 |
An accurate metric for the time step control in the power device transient simulation is proposed. This metric contains ... [more] | SDM2017-70 pp.47-52 |
| ICD, SDM | 2007-08-23 09:20 |
Hokkaido | Kitami Institute of Technology | Evaluation of Heterogeneous Multicore Architecture with AAC-LC Stereo Encoding Hiroaki Shikano (Hitachi/./Waseda Univ.), Masaki Ito, Takashi Todaka, Takanobu Tsunoda, Tomoyuki Kodama, Masafumi Onouchi, Kunio Uchiyama (Hitachi), Toshihiko Odaka (Hitachi/./Waseda Univ.), Tatsuya Kamei, Ei Nagahama, Manabu Kusaoke, Yusuke Nitta (Renesas Technology), Yasutaka Wada, Keiji Kimura, Hironori Kasahara (Waseda Univ.) SDM2007-143 ICD2007-71 |
This paper describes a heterogeneous multi-core processor (HMCP) architecture which integrates general purpose processor... [more] | SDM2007-143 ICD2007-71 pp.11-16 |
| ICD, IPSJ-ARC | 2007-05-31 13:45 |
Kanagawa | Mutligrain Parallel Processing in SMP Execution Mode on a Multicore for Consumer Electronics Masayoshi Mase, Daisuke Baba, Harumi Nagayama, Hiroaki Tano, Takeshi Masuura, Takamichi Miyamoto, Jun Shirako, Hirofumi Nakano, Keiji Kimura (Waseda Univ.), Tatsuya Kamei, Toshihiro Hattori, Atsushi Hasegawa (Renesas Technology), Masaki Ito, Makoto Satoh, Kunio Uchiyama (Hitachi Ltd.) |
Currently, multicore processors are becoming ubiquitous in various computing domains, namely con- sumer electronics suc... [more] |
ICD2007-21 pp.25-30 |
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| ICD, IPSJ-ARC | 2007-05-31 14:15 |
Kanagawa | A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption Kiyoshi Hayase, Yutaka Yoshida, Tatsuya Kamei, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa (Renesas technology), Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka (Hitachi Ltd.), Kiwamu Takada (Hitachi ULSI Systems Co. Ltd.), Keiji Kimura, Hironori Kasahara (Waseda Univ.) ICD2007-22 |
4320MIPS 4-processor SoC that provides with low power consumption and high performance was designed using 90nm process. ... [more] | ICD2007-22 pp.31-35 |
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