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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY, DC, IPSJ-ARC [detail] | 2021-07-21 10:15 |
Online | Online | Lossy Error Correction Coding for Vector-Matrix Multiplication Leo Otani, Haruhiko Kaneko (Tokyo Tech)  CPSY2021-7 DC2021-7 |
Error control codes are effective to improve the reliability and precision of the vector-matrix multiplications executed... [more] | CPSY2021-7 DC2021-7 pp.37-42 |
| HWS, VLD [detail] | 2020-03-05 14:55 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
[Memorial Lecture]
A Tuning-Free Hardware Reservoir Based on MOSFET Crossbar Array for Practical Echo State Network Implementation Yuki Kume, Song Bian, Takashi Sato (Kyoto Univ.) VLD2019-118 HWS2019-91 |
Echo state network (ESN) is a class of recurrent neural network, and is known for drastically reducing the training time... [more] | VLD2019-118 HWS2019-91 pp.139-144 |
| HWS, VLD [detail] | 2020-03-06 16:50 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Performance Evaluation of Echo State Networks with Hardware Reservoirs Yuki Kume, Song Bian, Kenta Nagura, Takashi Sato (Kyoto Univ.) VLD2019-136 HWS2019-109 |
Echo state Network (ESN), a class of recurrent neural network, is characteristic in its use of a reservoir having random... [more] | VLD2019-136 HWS2019-109 pp.245-250 |
| ICD | 2017-04-21 11:00 |
Tokyo | [Invited Lecture]
Highly reliable Cu atom switch using thermally tolerant Polymer-solid Electrolyte (TT-PSE) for Nonvolatile Programmable Logic Koichiro Okamoto, Munehiro Tada, Naoki Banno, Noriyuki Iguchi, Hiromitsu Hada, Toshitsugu Sakamoto, Makoto Miyamura, Yukihide Tsuji, Ryusuke Nebashi, Ayuka Morioka, Xu Bai, Tadahiko Sugibayashi (NEC) ICD2017-13 |
Robust Cu atom switch with higher operation reliability has been developed featuring an over-400C thermally tolerant pol... [more] | ICD2017-13 pp.67-72 |
|
| IN | 2014-06-27 13:00 |
Kagawa | Kagawa Univ. | Study on Pruned Crossbar Switches, Part II
-- Torus-Embedded Pruned Crossbar Switch -- Hitoshi Obara (Akita Univ.) IN2014-27 |
A new pruned crossbar switch, i.e. torus-embedded crossbar switch, is described in this technical report. We begin with ... [more] | IN2014-27 pp.67-72 |
| OME, EMD, CPM | 2014-06-20 11:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Study on Pruned Crossbar Switches, Part I
-- Basics of crossbar switches and our reserch framework for developing new types of pruned crossbar switches -- Hitoshi Obara (Akita Univ.) EMD2014-13 CPM2014-33 OME2014-21 |
Our research framework for developing possible new types of pruned crossbar switches is described in this technical repo... [more] | EMD2014-13 CPM2014-33 OME2014-21 pp.27-32 |
| VLD | 2010-03-12 15:25 |
Okinawa | A Design of an Adaptive Network on Chip for the Many-core System Hiroshi Kadota (Kyushu Univ.), Akiyoshi Wakatani (Konan Univ.) VLD2009-129 |
It is necessary to enhance the performance of network-on-chip(NoC) in the many-core system for the realization of high-s... [more] | VLD2009-129 pp.181-186 |
|
| CPSY | 2007-12-19 13:00 |
Kyoto | Campus Plaza Kyoto | Evaluation of Switch Architecture Using Hybrid Structure of Crossbar and Arbiter under Variable Length Packet Environment Takanori Mitsuno, Hiroaki Nishi (Keio Univ.) CPSY2007-41 |
New router architecture is required for achieving large-bandwidth and fine-grain communication to fill the needs of the ... [more] | CPSY2007-41 pp.3-8 |
| RECONF | 2007-05-18 11:10 |
Ishikawa | Kanazawa Bunka Hall | * Hiroshi Kadota (Kyushu Univ.), Akiyoshi Wakatani (Konan Univ.) RECONF2007-14 |
A new architecture of parallel processor is proposed, whose processing element can support various types of operations i... [more] | RECONF2007-14 pp.79-84 |
| CS, IE, ITE-BCT, IPSJ-AVM | 2006-12-15 09:30 |
Aichi | Nagoya Univ. | Proposal of a new distributing algorithm for Load Balanced Linear Switch Nishizaki Hideki, Kenshin Yamada (NEC) CS2006-58 IE2006-126 |
To accommodate increasing traffic of access and backbone networks year by year, communications equipment such as routers... [more] | CS2006-58 IE2006-126 pp.1-6 |
| CS, CQ (Joint) |
2006-04-18 09:50 |
Akita | Akita Univ. | Proposal for a scheduling method of a high-speed packet switch Toshiaki Arikawa, Kenshin Yamada, Hideki Nishizaki, Ryuichi Ikematsu, Akihiro Miyamoto (NEC) CS2006-12 |
As network traffic increases rapidly in access / backbone networks, communications equipment such as core routers is req... [more] | CS2006-12 pp.57-61 |
| RECONF | 2005-12-01 13:30 |
Fukuoka | Kitakyushu International Conference Center | Architecture Overview of Reconfigurable Processor FE-GA for Digital Media Processing Takanobu Tsunoda, Masashi Takada, Yohei Akita, Hiroshi Tanaka, Makoto Satoh, Masaki Ito (Hitachi) |
We developed a dynamically-reconfigurable processor Flexible Engine/Generic ALU array (FE-GA) targeting to digital media... [more] | RECONF2005-65 pp.37-41 |
| IN | 2004-10-15 13:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
Backbone router architecture for the next generation internet consisting of 100-Gbps mutifunctional network Hiroaki Nishi (keio Univ.) |
A router architecture for supporting the increasing internet traffic, called Tera-Gears, is discussed. Tera-Gears consis... [more] | IN2004-90 pp.41-46 |
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