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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| NLP | 2012-11-20 10:00 |
Miyagi | Ishinomaki Senshu University | Creation and Annihilation of Trajectories in Discrete-Time Piecewise Constant Systems Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa (Hiroshima City Univ.)  NLP2012-84 |
Switched-capacitor sigma-delta modulators possessing quantizers are considered as discrete-time systems with piecewise ... [more] | NLP2012-84 pp.43-48 |
| AN, USN, SR, RCS (Joint) |
2010-10-27 12:50 |
Osaka | Osaka University | Performance Analysis of Sigma-delta ADC with Fractional Sample Rate Conversion Akira Tanaka, Mamiko Inamori, Yukitoshi Sanada (Keio Univ.) SR2010-40 |
This work presents a sigma-delta analog-to-digital converter (ADC) with Fractional Sample Rate Con- version (SRC). Our ... [more] |
SR2010-40 pp.1-6 |
| NLP, CAS | 2010-08-03 15:10 |
Tokushima | Naruto University of Education | Bandpass Sigma-Delta Domain Digital Wave Filters Takashi Yasuno, Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa (Hiroshima City Univ.) CAS2010-63 NLP2010-79 |
The use of bandpass sigma-delta (BPSD) modulators is increasing with digitalization of communication circuits. This pap... [more] |
CAS2010-63 NLP2010-79 pp.165-170 |
| ICD, ITE-IST | 2010-07-22 15:50 |
Osaka | Josho Gakuen Osaka Center | [Invited Talk]
A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer with a Time-Windowed Time-to-Digital Converter Tadashi Maeda, Takashi Tokairin (Renesas Electronics Corporation), Masaki Kitsunezuka (NEC Corp.), Mitsuji Okada (Renesas Electronics Corporation), Muneo Fukaishi (NEC Corp.) ICD2010-29 |
A 2.1-to-2.8-GHz low-power consumption all-digital phase locked loop (ADPLL) with a time-windowed time-to-digital conver... [more] | ICD2010-29 pp.49-54 |
| NLP | 2009-03-10 13:00 |
Kyoto | A Hardware Inplementable Model of Sigma-Delta Cellular Neural Network Hisashi Aomori, Yuki Naito, Mamoru Tanaka (Sophia Univ.) NLP2008-155 |
The sigma-delta cellular neural network (SD-CNN) is a complete framework of a spatial domain sigma-delta modulator, and ... [more] | NLP2008-155 pp.25-30 |
|
| NLP | 2007-06-09 10:15 |
Hiroshima | An Analysis of Second-Order Sigma-Delta Modulators and its Application to AC Load Monitor Keita Hayashi, Tsubasa Katao, Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa (Hiroshima City Univ.) NLP2007-26 |
We analyzed the behavior of discrete-time second-order sigma-delta modulators in state space. As a result of the analysi... [more] | NLP2007-26 pp.19-23 |
|
| NLP | 2007-03-06 09:50 |
Miyagi | Paralleled multi-step analog-to-digital converters Takayuki Kabasawa, Aya Tanaka, Yusuke Matsuoka, Toshimichi Saito (Hosei Univ.) |
This paper studies basic dynamics of paralleled multi-step A/D converter. First, we introduce a basic Sigma-Delta modu... [more] |
NLP2006-156 pp.13-16 |
|
| NLP, CAS | 2006-10-05 11:40 |
Osaka | Sorter-based Sigma-Delta Domain Multi-level Operators - Part I Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa (Hiroshima City Univ.) |
This paper presents a multi-level adder as a fundamental circuit module for sigma-delta domain signal processing.Binary ... [more] | CAS2006-40 NLP2006-63 pp.35-40 |
|
| NLP, CAS | 2006-10-05 12:05 |
Osaka | Sorter-based Sigma-Delta Domain Multi-level Operators - Part II Hisato Fujisaka, Takeshi Kamio, Kazuhisa Haeiwa (Hiroshima City Univ.) |
This paper presents a multi-level multipler and multi-level piecewise linear circuits for sigma-delta domain signal proc... [more] | CAS2006-41 NLP2006-64 pp.41-46 |
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| NLP | 2006-07-03 13:20 |
Ishikawa | Kanazawa Univ. | A Spatial Domain Sigma-Delta Modulator Using Discrete Time Cellular Neural Networks Hisashi Aomori (Sophia Univ.), Tsuyoshi Otake (Tamagawa Univ.), Nobuaki Takahashi (IBM Japan, Ltd.), Mamoru Tanaka (Sophia Univ.) |
In this paper, a novel spatial domain sigma-delta modulator using discrete-time cellular neural networks (DT-CNNs) is pr... [more] | NLP2006-24 pp.13-18 |
| CAS, SIP, CS | 2006-03-07 15:10 |
Okinawa | Univ of Ryukyu | SD modulator with the level shifter Takashi Kawamoto, Masaru Kokubo, Takashi Oshima (Hitachi CRL), Takayuki Noto, Jun Kasai, Shigeyuki Suzuki, Tomoaki Takahashi, Takashi Hayasaka, Masato Suzuki (Renesaas Technology Corp.) |
We have developed the low noise sigma-delta modulator for Spread spectrum clock generator applied for Serial ATA, which ... [more] | CAS2005-127 SIP2005-173 CS2005-120 pp.55-60 |
| ICD | 2005-05-27 14:30 |
Hyogo | Kobe Univ. | Spread-Spectrum Clock Generator for Serial ATA using Fractional PLL controlled by Delta-Sigma Modulator with Level Shifter Takashi Kawamoto, Masaru Kokubo, Takashi Oshima (Hitachi Ltd), Takayuki Noto, Masato Suzuki, Shigeyuki Suzuki, Takashi Hayasaka, Tomoaki Takahashi, Jun Kasai (Renesas Technology Corp.) |
The spread spectrum clock generator (SSCG) for Serial ATA with a new architecture is fabricated in a 0.15um CMOS process... [more] | ICD2005-35 pp.39-44 |
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