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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
KBSE 2024-01-24
15:40
Kagoshima
(Primary: On-site, Secondary: Online)
Improvement of learning method using intermediate representation in machine learning method for code smell detection
Risa Hirahara, Tomoji Kishi (Waseda Univ.) KBSE2023-64
In recent years,methods for detecting code smells have mainly been researched using machine learning.However,the disadva... [more] KBSE2023-64
pp.79-84
NS, IN, CS, NV
(Joint)
2023-09-08
14:45
Miyagi Tohoku University
(Primary: On-site, Secondary: Online)
Loop Processing Performance in Kotlin and Java
Hayataka Nakamura (Kogakuin Univ.), Takeshi Kamiyama (Nagasaki Univ.), Masato Oguchi (Ochanomizu Univ.), Saneyasu Yamaguchi (Kogakuin Univ.) NS2023-65
We evaluated the performance of Kotlin and Java programs, and thereafter, proposed a method to improve the performance o... [more] NS2023-65
pp.77-82
NLP, MSS 2023-03-16
14:00
Nagasaki
(Primary: On-site, Secondary: Online)
[Invited Talk] Social Applications of FPGA and Machine Learning
Yuichiro Shibata, Taito Manabe (Nagasaki Univ.) MSS2022-87 NLP2022-132
A field programmable gate array (FPGA) is a programmable device that allows users to configure logic circuits at their h... [more] MSS2022-87 NLP2022-132
p.121
TL 2018-10-28
13:00
Hokkaido National Institute of Technology, Hakodate College An investigation of identifier naming strongly linked to specific pattern of program structure
Yoshiki Mashima (O.E.C.U.), Sachio Hirokawa (Kyushu Univ.), Kazuhiro Takeuchi (O.E.C.U.) TL2018-40
Identifiers in programming language such as variable names, class names, and method names are generally given in natural... [more] TL2018-40
pp.7-12
RECONF 2018-09-18
14:50
Fukuoka LINE Fukuoka Cafe Space Data Flow Representation and its Applications to Machine Learning Accelerator
Kazuki Nakada (Tsukuba Univ. of Tech.), Keiji Miura (Kwansei Gakuin Univ.) RECONF2018-32
Researches and development of machine learning accelerators have been rapidly progressing. It is becoming important to r... [more] RECONF2018-32
pp.73-78
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-18
16:00
Kanagawa Raiosha, Hiyoshi Campus, Keio University Integrated Machine Code Monitor on FPGA
Hiroaki Kaneko, Akinori Kanasugi (TokyoDenki Univ.) VLD2017-73 CPSY2017-117 RECONF2017-61
Machine code monitor is necessary for initial program development stage when implementing a new processor with unique IS... [more] VLD2017-73 CPSY2017-117 RECONF2017-61
pp.65-70
IN, MoNA, CNR
(Joint)
2016-11-17
15:00
Kagoshima Kirishima-kanko Hotel [Invited Talk] The collaboration between Digital IT platform and Cognitive solution - IBM Bluemix + Watson
Misaki Utou (IBM Japan) MoNA2016-25
Cognitive system and Cloud platform is IBM’s focused area with high priority in 2016. IBM defines that Cognitive sy... [more] MoNA2016-25
p.17
IPSJ-SLDM, CPSY, RECONF, VLD [detail] 2014-01-29
16:45
Kanagawa Hiyoshi Campus, Keio University Binary Synthesis of Hardware Accelerator Tightly Coupled with CPU
Shimpei Tamura, Nagisa Ishiura (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Hiroyuki Tomiyama (Ritsumeikan Univ.) VLD2013-133 CPSY2013-104 RECONF2013-87
This article presents a method of synthesizing hardware that accelerates specified sections of binary programs. The acce... [more] VLD2013-133 CPSY2013-104 RECONF2013-87
pp.185-190
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