IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 116, Number 177

Computer Systems

Workshop Date : 2016-08-08 - 2016-08-10 / Issue Date : 2016-08-01

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Table of contents

CPSY2016-10
Proposal of hash-based string matching algorithm for multiple-stream multiple-query using failure transition
Kosuke Nishimura, Hiroaki Nishi (Keio Univ.)
pp. 1 - 6

CPSY2016-11
An FPGA Implementation of LZW Compression
Xin Zhou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.)
pp. 7 - 12

CPSY2016-12
A GPU Implementation of the CKY Parsing using Bitwise Parallel Bulk Computation
Toru Fujita, Koji Nakano, Yasuaki Ito (Hiroshima Univ.)
pp. 13 - 18

CPSY2016-13
Efficient implementation method of a compact HTM into processor cores
Takahiro Sakurada, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo (Mie Univ.)
pp. 45 - 50

CPSY2016-14
Selecting Method from Multiple Synchronization Techniques by Cooperating with Thread Scheduler
Yuto Tamura, Kohta Nakashima (Fujitsu Laboratories LTD)
pp. 51 - 56

CPSY2016-15
(See Japanese page.)
pp. 71 - 76

CPSY2016-16
Toward improving I/O performance of Spark RDD
Kaihui Zhang (Tsukuba Univ.), Yusuke Tanimura, Hidemoto Nakada, Hirotaka Ogawa (AIST)
pp. 77 - 82

CPSY2016-17
Write Optimization for SSDs using Workload-aware Cache Allocation
Shugo Ogawa (NEC)
pp. 83 - 88

CPSY2016-18
Evaluation of FSO Assignment for Inter-Rack Communication between Remote GPUs and SSDs
Hiroaki Hara, Shin Morishima (Keio Univ.), Michihiro Koibuchi (NII), Hideharu Amano, Hiroki Matsutani (Keio Univ.)
pp. 89 - 94

CPSY2016-19
High Performance of Cache by Dynamic Control to Area Division
Maika Tone, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo (Mie Univ.)
pp. 119 - 124

CPSY2016-20
A simulation study on fault tolerancy of parallel machine learning systems with parameter servers
Mingxi Li (Univ. of Tsukuba), Yusuke Tanimura, Hidemoto Nakada (AIST)
pp. 125 - 130

CPSY2016-21
A study on t/m-bit mis-synchronization channel model and error control coding
Haruhiko Kaneko (Tokyo Tech)
pp. 131 - 138

CPSY2016-22
Formulating Attack Condition on Received Signal Strength Indicator based Device Authentication
Tatsuya Fujii, Takatsugu Ono, Haruichi Kanaya, Koji Inoue (Kyushu Univ.)
pp. 139 - 146

CPSY2016-23
A Packet Route Specification Method for Network Security using Multiple Encryption and Decryption of the Tag in the Packet
Kento Masukawa, Hiroaki Nishi (Keio Univ.)
pp. 155 - 160

CPSY2016-24
A Fast Emulation System for Fat-Tree-Based Network-on-Chips
Thiem Van Chu, Kenji Kise (Tokyo Tech)
pp. 161 - 166

CPSY2016-25
An Acceleration of a Random Forest Classification using Altera SDK for OpenCL
Hiroki Nakahara, Akira Jinguji, Tomoya Fujii, Shinpei Sato (TITECH), Naoya Maruyama (RIKEN)
pp. 175 - 180

CPSY2016-26

Hisakazu Fukuoka, Ryusuke Yamano, Shinya Takamaeda, Yasuhiko Nakashima (NAIST)
pp. 181 - 186

CPSY2016-27
High Performance I/O Processing Using Kernel-bypass and Light-weight User-leval Threading by RMI on DPDK
Munenori Maeda, Yuto Tamura, Yuki Matsuo, Mitsuru Sato, Kohta Nakashima (Fujitsu Laboratories Ltd.)
pp. 187 - 191

CPSY2016-28
A Multigrain Parallel Video Processing Environment
Kazuki Furuhashi, Kazuma Ono, Tomoaki Tsumura (Nagoya Inst. of Tech.)
pp. 193 - 198

CPSY2016-29
micro-lens boundary portion removal approach for accelerating HEVC compression of the light field video
Takamasa Mitani, Satoshi Shimaya, Yuttakon Yuttakonkit, Yasuhiko Nakashima (NAIST)
pp. 199 - 204

CPSY2016-30
Performance Evaluation of PEACH3
Takahiro Kaneda, Chiharu Tsuruta (Keio Univ), Toshihiro Hanawa (UTokyo), Hideharu Amano (Keio Univ)
pp. 205 - 210

CPSY2016-31
A Low-Latency Offloading for Spark Streaming Using FPGA NIC
Kohei Nakamura, Ami Hayashi, Hiroki Matsutani (Keio Univ.)
pp. 211 - 216

CPSY2016-32
On-the-fly data compression for ExpEther
Hideki Shimura, Takuji Mitsuishi (Keio Univ), Masaki Kan, Takashi Yoshikawa (NEC), Hideharu Amano (Keio Univ)
pp. 217 - 222

CPSY2016-33
An Impact of In-Network Caching on Energy Saving for ISP Networks
Kota Nojima, Takayuki Shiroma, Takuma Nakajima, Masato Yoshimi, Celimuge Wu, Tsutomu Yoshinaga (UEC)
pp. 223 - 228

CPSY2016-34
An Automatic Disaster Recovery Scheme for Inter-cloud Environment
Atsuya Mizota, Takayuki Shiroma, Takuma Nakajima, Masato Yoshimi, Celimuge Wu, Tsutomu Yoshinaga (UEC)
pp. 229 - 234

CPSY2016-35
(See Japanese page.)
pp. 257 - 262

CPSY2016-36
Acceleration of the satellite engine simulation using Zynq
Ryotaro Sakai (Keio Univ.), Takaaki Miyajima (JAXA), Naru Sugimoto (Keio Univ.), Naoyuki Fujita (JAXA), Hideharu Amano (Keio Univ.)
pp. 263 - 268

CPSY2016-37
Fast Simulation of Conway's Game of Life using the FPGA
Yuma Hamada, Xin Zhou, Koji Nakano, Yasuaki Ito (Hiroshima Univ.)
pp. 269 - 274

CPSY2016-38
Random Grid Graph for Low-Latency Networks
Koji Nakano, Daisuke Takafuji, Satoshi Fujita (Hiroshima Univ.), Hiroki Matsutani (Keio Univ.), Ikki Fujiwara, Michihiro Koibuchi (NII)
pp. 275 - 280

CPSY2016-39
(See Japanese page.)
pp. 281 - 286

CPSY2016-40
Regularly Edge-added Torus Graphs with the Minimum Diameter and the Minimum Average Shortest Path Length
Hiroyuki Kobayashi, Noriyuki Fujimoto (Osaka Prefecture Univ.)
pp. 287 - 292

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan