IEICE Technical Report

Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380

Component Parts and Materials

Workshop Date : 2016-11-29 - 2016-11-30 / Issue Date : 2016-11-22

CPM2016-76
Measurement of Vth Variation due to STI Stress and Inverse Narrow Channel Effect at Ultra-Low Voltage in a Variability-Suppressed Process
Yasuhiro Ogasahara, Hanpei Koike (AIST)
pp. 1 - 6

CPM2016-77
Optimal configuration design of SCM and MLC/TLC NAND flash memory in semiconductor storage system
Chihiro Matsui, Yusuke Yamaga, Yusuke Sugiyama, Ken Takeuchi (Chuo Univ.)
pp. 7 - 10

CPM2016-78
EMI Performance of Power Delivery Networks in 3D TSV Integration
Yuuki Araga (AIST), Makoto Nagata, Noriyuki Miura, Hiroaki Ikeda (Kobe Univ.), Katsuya Kikuchi (AIST)
pp. 11 - 16

CPM2016-79
[Invited Talk] Development of Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel Signal Processors by Using Direct Bonding of SOI Layers
Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi (NHK), Takuya Saraya, Masaharu Kobayashi, Eiji Higurasgi, Hiroshi Toshiyoshi, Toshiro Hiramoto (Univ. Tokyo)
pp. 17 - 21

CPM2016-80
[Invited Talk] Ultra-large-scale ultra-high-speed image display technology and applications -- Application of Image big data --
Hidemichi Kawase (Kamiens)
p. 23

CPM2016-81
[Keynote Address] CMOS Annealing Machine to Solve Combinatorial Optimization Problems for IoT Era
Masanao Yamaoka (Hitachi)
pp. 25 - 30

CPM2016-82
[Keynote Address] The development of video coding technology and contribution to HD transition
Akira Nakagawa (Fujitsu Labs.)
p. 31

CPM2016-83
A Power-saving Method for Real-time HEVC Encoder LSIs
Takayuki Onishi, Yuya Omori, Hiroe Iwasaki, Atsushi Shimizu (NTT)
pp. 33 - 38

CPM2016-84
Shift-Register-Based Single-Flux-Quantum Cache Memory Architecture
Koki Ishida (Kyushu Univ.), Masamitsu Tanaka (Nagoya Univ.), Takatsugu Ono, Koji Inoue (Kyushu Univ.)
pp. 39 - 44

CPM2016-85
Keypoint Detection based on Learning to Rank for Robust Image Matching under Resolution Variation
Satoshi Yoshikawa, Keisuke Kameyama (Univ. of Tsukuba)
pp. 45 - 50

CPM2016-86
Design of High-Speed Low-Power Analog-to-Digital Converter for a Nonvolatile Micro-controller -- High-Speed Low-Power Reference-Less SAR-ADC --
Tamakoshi Akira, Masanori Natsui, Takahiro Hanyu (Touhoku Univ.)
pp. 51 - 56

CPM2016-87
Fully Integrated, 100-mV Minimum Input Voltage Converter with Gate-Boosted Charge Pump for Energy Harvesting
Hiroshi Fuketa, Shin-ichi O'uchi, Takashi Matsukawa (AIST)
pp. 57 - 62

CPM2016-88
A study on verification method of stochastic flash A/D converter with FPGA
Shodai Isami, Toshimasa Matsuoka (Osaka Univ)
pp. 63 - 67

CPM2016-89
ReRAM Write Voltage Generator with Low Supply Voltage Operation and Optimized Comparator Bias-Current Scheme for IoT Edge Device
Kota Tsurumi, Masahiro Tanaka, Ken Takeuchi (Chuo Univ.)
pp. 69 - 74

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan