IEICE Technical Report

Print edition: ISSN 0913-5685      Online edition: ISSN 2432-6380

Volume 118, Number 10

Integrated Circuits and Devices

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Table of contents

ICD2018-1
Reliability Enhancement Technique with Horizontal Error Detection and Vertical-LDPC in 3D-TLC NAND Flash Memories
Shun Suzuki, Yoshiaki Deguchi, Toshiki Nakamura, Kyoji Mizoguchi, Ken Takeuchi (Chuo Univ.)
pp. 1 - 6

ICD2018-2
Application-optimized heterogeneously-integrated storage with non-volatile memories
Chihiro Matsui, Ken Takeuchi (Chuo Univ.)
pp. 7 - 10

ICD2018-3
[Invited Talk] Data-aware Computing with Highly Reliable SSD System
Ken Takeuchi (Chuo Univ.)
p. 11

ICD2018-4
[Invited Talk] VLSI implementation of chaotic Boltzmann machine for deep learning hardware
Takashi Morie, Masatoshi Yamaguchi, Ichiro Kawashima, Hakaru Tamukoh (Kyushu Inst. of Tech.)
p. 13

ICD2018-5
[Invited Talk] Hard- and Soft- Synchronized Developments of Resistive Analog Neuro Devices and Systems
Hiroyuki Akinaga, Hisashi Shima, Yasuhisa Naitoh (AIST), Tetsuya Asai (Hokkaido Univ.)
p. 15

ICD2018-6
[Invited Talk] Problem solving of artificial intelligence with the Memorism processor
Katsumi Inoue (AOT), Pham Cong-Kha (UEC)
pp. 17 - 22

ICD2018-7
[Invited Lecture] A new core transistor equipped with NVM functionality without using any emerging memory materials
Yasuhiro Taniguchi, Shoji Yoshida, Owada Fukuo, Yutaka Shinagawa, Hideo Kasai (Floadia), Lin Jia You, Wei I Huan (PTC), Daisuke Okada, Koichi Nagasawa, Kosuke Okuyama (Floadia)
pp. 23 - 27

ICD2018-8
[Invited Lecture] An Implementation of 2RW Dual-Port SRAM using 65 nm Silicon-on-Thin-Box (SOTB) for Smart IoT
Yohei Sawada, Yoshiki Yamamoto, Takumi Hasegawa, Hiroki Shinkawata, Makoto Yabuuchi (REL), Yoshihiro Shinozaki, Kyoji Ito (NSW), Shinji Tanaka, Nii Koji, Shiro Kamohara (REL)
pp. 29 - 32

ICD2018-9
[Invited Lecture] A Dynamic Power Reduction in Synchronous 2RW 8T Dual-Port SRAM by Adjusting Wordline Pulse Timing with Same/Different Row Access Mode
Yoshisato Yokoyama, Yuichiro Ishii, Haruyuki Okuda, Koji Nii (REL)
pp. 33 - 38

ICD2018-10
[Invited Talk] A 512Gb 3b/Cell 3D Flash Memory on a 96-Word-Line-Layer Technology
Hiroshi Maejima, Kazushige Kanda, Susumu Fujimura, Teruo Takagiwa, Susumu Ozawa, Jumpei Sato, Yoshihiko Shindo, Manabu Sato, Naoaki Kanagawa, Junji Musha, Satoshi Inoue, Katsuaki Sakurai, Toshifumi Hashimoto (TMC), Hao Nguyen, Ken Cheah, Hiroshi Sugawara, Seungpil Lee (WDC), Toshiki Hisada, Tetsuya Kaneko, Hiroshi Nakamura (TMC)
pp. 39 - 44

ICD2018-11
[Invited Talk] Random Circuits for Information Security
Hirofumi Shinohara (Waseda Univ.)
p. 45

ICD2018-12
[Invited Talk] Memory LSI using crystalline oxide semiconductor FET
Jun Koyama, Takako Seki, Yuto Yakubo, Satoru Ohshita, Kazuma Furutani, Takahiko Ishizu, Tomoaki Atsumi, Yoshinori Ando, Daisuke Matsubayashi, Kiyoshi Kato, Takashi Okuda (SEL), Masahiro Fujita (The Univ. of Tokyo), Shunpei Yamazaki (SEL)
pp. 47 - 52

ICD2018-13
[Invited Talk] Design and Development of a memory-based reconfigurable logic device
Mamoru Ohara (TIRI), Masayuki Sato (TRL), Tadashi Okabe (TIRI), Mitsunori Katsu (TRL)
pp. 53 - 54

Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.