Online edition: ISSN 2432-6380
[TOP] | [2018] | [2019] | [2020] | [2021] | [2022] | [2023] | [2024] | [Japanese] / [English]
DC2024-16
Tomoya Aoyama (Tokyo Metro. Univ.), Moe Sugiyama, Masayuki Arai (Nihon Univ.), Satoshi Fukumoto (Tokyo Metro. Univ.)
pp. 1 - 4
DC2024-17
A Test Pattern Replacement Method to Achieve Both Complete Fault Efficiency and Complete Diagnosis Resolution
Tatsuya Aono, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Koji Yamazaki (Meiji Univ.)
pp. 5 - 10
DC2024-18
Circuit implementation for a radiation-hardened repairable FPGA
Ryota Hosoya, Minoru Watanabe, Nobuya Watanabe (Okayama Univ.)
pp. 11 - 13
DC2024-19
(See Japanese page.)
pp. 14 - 18
DC2024-20
Improving Client-Side Operations in Fully Homomorphic Encryption over the Torus with Single Board Computers
Marin Matsumoto (Ochanomizu Univ.), Ai Nozaki (The Univ. of Tokyo), Arisa Tsuji (Ochanomizu Univ.), Hideki Takase (The Univ. of Tokyo), Masato Oguchi (Ochanomizu Univ.)
pp. 19 - 26
DC2024-21
Clock distribution method exploiting switching matrices on an optically reconfigured gate array VLSI
Ayumu Ogura, Minoru Watanabe, Nobuya Watanabe (Okayama Univ.)
pp. 27 - 31
DC2024-22
A study of the impact of imbalanced data flows on the RIKEN CGRA
Yasuto Aihara, Takaaki Miyajima (Meiji Univ.), Boma Adhi, Kentaro Sano (RIKEN)
pp. 32 - 33
DC2024-23
Distribution Shift Detection and On-device Fine-tuning of GAT for Edge Devices
Kazuki Nakazawa, Hiroki Matsutani (Keio Univ.)
pp. 34 - 39
DC2024-24
Performance evaluation for directive-based parallelization code at the LLVM IR level
Takumi Yanagida, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.)
pp. 40 - 45
DC2024-25
X-Filling and Test Scheduling Methods for Concurrent Testing Using Optimistically/Pessimistically Structural Symbolic Simulation
Haruta Tokuta, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.)
pp. 46 - 51
DC2024-26
Basic Evaluation of Throughput and Power Efficiency by Offloading Image Recognition Processing to FPGA
Eisuke Okazaki, Gai Nagahashi (Tokai Univ.), Yanzhi Li, Midori Sugaya (SIT), Takeshi Ohkawa (Kumamoto Univ.), Mikiko Sato (Tokai Univ.)
pp. 52 - 57
DC2024-27
Evaluation of Communication Latency in Robot Teleoperation Using Resource Management System for MEC
Gai Nagahashi, Eisuke Okazaki (Tokai Univ.), Li Yanzhi, Midori Sugaya (SIT), Mikiko Sato (Tokai Univ.)
pp. 58 - 62
DC2024-28
An Acceleration Method for Distributed Reinforcement Learning in Edge-Cloud Environments Using Experience Cache
Tomohiro Ojika, Kousei Kudatatsu (Toyama Prefectural Univ.), Hiroki Matsutani (Keio Univ.), Shin Morishima (Toyama Prefectural Univ.)
pp. 63 - 68
DC2024-29
(See Japanese page.)
pp. 69 - 74
DC2024-30
Development of a Web-based Programming Education Support System for Collaborative and Simultaneous Use Across Multiple Subjects
Kazuichi OE (NII), Tomoya Saito (Yamaguchi Univ.), Yuko Tsutsui (NII), Tomoya Tanjo (NIG), Jun Nishii, Koichi Okada, Takahiro Tamesue, Yue Wang (Yamaguchi Univ.), Atsuko Takefusa (NII)
pp. 75 - 83
DC2024-31
Improving a Congestion Treatment Method for the D2D Distributed Cooperative Cache
Masashi Miyahara, Celimuge Wu, Tsutomu Yoshinaga (UEC)
pp. 84 - 89
DC2024-32
Enhancing Memory Pool Management for Efficient Data Transfer between Host and Enclave
Jianxuan Ding, Koichiro Kiji, Akihiro Saiki, Keiji Kimura (Waseda Univ.)
pp. 90 - 95
DC2024-33
Acceleration of data assimilation for rainfall prediction with co-design of hardware and software
Deshmukh Sameer Satish (Fujitsu), Amemiya Arata (RIKEN), Honda Takumi, Elmon Lang Ian (Fujitsu)
pp. 96 - 101
DC2024-34
A Transaction Processing Method for Approximate Query Processing Engines
Hideyuki Kawashima (Keio Univ.)
pp. 102 - 107
DC2024-35
Experiment of AI Learning Relations between Technical Sentences and Creating Training Data for Fine-Tuning using Natural Language Processing
Jun Yoshinaga (NALTEC)
pp. 108 - 111
DC2024-36
(See Japanese page.)
pp. 112 - 117
DC2024-37
Vlog Resharding for High-Performance Range Query in Key-Value Store
Naoto Sugiura (Keio Univ.), Daichi Fujiki (Titech)
pp. 118 - 123
DC2024-38
Acceleration of Binary128 Matrix Multiplication with Applications by FPGA
Fumiya Kono (SIST), Naohito Nakasato (UoA), Mao Nakata (RIKEN)
pp. 124 - 129
DC2024-39
TMR/DMR adaptive soft-error tolerant redundant system using FPGA cluster
Homu Omura, Kazuteru Namba (Chiba Univ.)
pp. 130 - 134
DC2024-40
(See Japanese page.)
pp. 135 - 140
DC2024-41
A Framework for reducing power consumption of multi-FPGA clusters
Kensuke Iizuka (Keio Univ.), Hideharu Amano (The Univ. of Tokyo)
pp. 141 - 146
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.