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Technical Committee on Hardware Security (HWS) (Searched in: 2019)
Search Results: Keywords 'from:2020-03-04 to:2020-03-04'
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS, VLD [detail] | 2020-03-04 09:30 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
A Method to Decide Row-Shift Decomposability of Index Generation Functions Tsunesada Kyoichiro, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU)  VLD2019-94 HWS2019-67 |
In this paper, we discuss a method to decide whether the index generation functions are row-shift decomposable or not. ... [more] |
VLD2019-94 HWS2019-67 pp.1-6 |
| HWS, VLD [detail] | 2020-03-04 09:55 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
A Pin-Pair Routing Method for Length Difference Reduction in Set-Pair Routing Kunihiko Wada, Shimpei Sato, Atsushi Takahashi (TokyoTech) VLD2019-95 HWS2019-68 |
In this paper, we propose a Routing method that aims to reduce total wire length and wire length difference for Set-Pair... [more] | VLD2019-95 HWS2019-68 pp.7-12 |
| HWS, VLD [detail] | 2020-03-04 10:30 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
An EVBDD-based Design Verification for Elementary Function Generators Hiroto Fukuhara, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU) VLD2019-96 HWS2019-69 |
This paper proposes a design verification based on edge-valued binary decision diagrams (EVBDDs) for elementary functio... [more] |
VLD2019-96 HWS2019-69 pp.13-18 |
| HWS, VLD [detail] | 2020-03-04 10:55 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
An Automatic Method to Generalize Matrix-Vector Multiplication with Multiple Processors Considering the Efficiency of the Communications Akihiro Goda, Masahiro Fujita (UT) VLD2019-97 HWS2019-70 |
[more] | VLD2019-97 HWS2019-70 pp.19-24 |
| HWS, VLD [detail] | 2020-03-04 11:20 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
A Study of Arithmetic-Oriented Application Implementations for Via-Switch FPGA Takashi Imagawa (Ritsumeikan Univ.), Yu Jaehoon (Tokyo Tech), Masanori Hashimoto (Osaka Univ.), Hiroyuki Ochi (Ritsumeikan Univ.) VLD2019-98 HWS2019-71 |
Via-Switch FPGAs have different features from conventional SRAM-based FPGAs. It is necessary to build the application ci... [more] | VLD2019-98 HWS2019-71 pp.25-29 |
| HWS, VLD [detail] | 2020-03-04 13:00 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
MTJ-based Nonvolatile Flip-Flop Circuit Using Dual Power Supplies for Low-voltage Operation Sosuke Akiba, Kimiyoshi Usami (SIT) VLD2019-99 HWS2019-72 |
One of the leakage reduction techniques is nonvolatile power gating(NVPG) by using magnetic tunnel junction(MTJ). In the... [more] | VLD2019-99 HWS2019-72 pp.31-36 |
| HWS, VLD [detail] | 2020-03-04 13:25 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
A Study of Dynamic Power Optimization by Latch Insertion for Asynchronous RTL Models Shogo Semba, Hiroshi Saito (UoA) VLD2019-100 HWS2019-73 |
In this paper, we propose a dynamic power optimization method by latch insertion for asynchronous RTL models. In data-pa... [more] | VLD2019-100 HWS2019-73 pp.37-42 |
| HWS, VLD [detail] | 2020-03-04 13:50 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Standard Cell Library of Stack Structured Cells to Reduce LSI Maximum Power Consumption Yuki Imai (Saitama Univ.), Shinichi Nishizawa (Fukuoka Univ.), Kazuhito Ito (Saitama Univ.) VLD2019-101 HWS2019-74 |
Energy harvesting elements such as solar cells used as power sources for IoT devices have large internal resistance, and... [more] | VLD2019-101 HWS2019-74 pp.43-48 |
| HWS, VLD [detail] | 2020-03-04 14:30 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Estimation method of process variation using an IDDQ test and retention characteristics of flip-flop Shinichi Nishizawa (Fukuoka Univ.), Kazuhito (Saitama Univ.) VLD2019-102 HWS2019-75 |
[more] | VLD2019-102 HWS2019-75 pp.49-52 |
| HWS, VLD [detail] | 2020-03-04 14:55 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Gate Sizing for Programmable Delay Elements on Post-Silicon Delay Tuning Kota Muroi, Yukihide Kohira (UoA) VLD2019-103 HWS2019-76 |
Due to progressing process technology, yield of chips is reduced by timing violation caused by delay variation of gates ... [more] | VLD2019-103 HWS2019-76 pp.53-58 |
| HWS, VLD [detail] | 2020-03-04 15:20 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Thermal-Aware Clock Skew Scheduling Based on Two-Graph Approach Mineo Kaneko (JAIST) VLD2019-104 HWS2019-77 |
[more] | VLD2019-104 HWS2019-77 pp.59-64 |
| HWS, VLD [detail] | 2020-03-04 16:00 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Pixel-based Mask Optimization with Lagrangian Relaxation and Boundary Flipping Rina Azuma, Yukihide Kohira (Univ. of Aizu), Tomomi Matsui, Atsushi Takahashi (Tokyo Tech), Chikaaki Kodama (KIOXIA) VLD2019-105 HWS2019-78 |
Due to miniaturization of process technology, progressing manufacturing process by optical lithography is required. In r... [more] | VLD2019-105 HWS2019-78 pp.65-70 |
| HWS, VLD [detail] | 2020-03-04 16:25 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Machine Learning Based Lithography Hotspot Detection Method and Evaluation Hidekazu Takahashi, Shimpei Sato, Atsushi Takahashi (Tokyo Tech) VLD2019-106 HWS2019-79 |
As VLSI device feature sizes are getting smaller and smaller, layout design has become more important to keep the yield... [more] |
VLD2019-106 HWS2019-79 pp.71-76 |
| HWS, VLD [detail] | 2020-03-04 16:50 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Additional Training Data Generation for Lithography Hotspot Detection by Modifying Existing Training Data Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) VLD2019-107 HWS2019-80 |
In lithography, a circuit pattern that is highly likely to cause an undesired open- and short-circuit after transfer is ... [more] | VLD2019-107 HWS2019-80 pp.77-82 |
| HWS, VLD [detail] | 2020-03-04 17:15 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
A Preliminary Study of Spectrum-based Feature Vectors for Lithography Hotspot Detection Masato Inagi, Gaku Kataoka, Shinobu Nagayama, Shin'ichi Wakabayashi (Hiroshima City Univ.) VLD2019-108 HWS2019-81 |
[more] | VLD2019-108 HWS2019-81 pp.83-88 |
| HWS, VLD [detail] | 2020-03-05 09:30 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Monte Carlo Tree Search for routing of delivery drone Kota Iwasaki, Yasuhiro Takashima (Univ. of Kitakyushu) VLD2019-109 HWS2019-82 |
In recent years, delivery drone becomes realistic. Thus, it is important to solve the routing problem of delivery drone,... [more] | VLD2019-109 HWS2019-82 pp.89-94 |
| HWS, VLD [detail] | 2020-03-05 09:55 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
HCP: History-based Congestion Prediction Algorithm for Network-on-Chip Zhenyu Hu, Michael Conrad Meyer (Waseda Univ.), Xin Jiang (NITKIT), Takahiro Watanabe (Waseda Univ.) VLD2019-110 HWS2019-83 |
[more] | VLD2019-110 HWS2019-83 pp.95-100 |
| HWS, VLD [detail] | 2020-03-05 10:30 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Motor Current Signature Analysis Based On-Line Fault Detection of DC Motor Naoki Osako (Kwansei Gakuin Univ.), Hiroyuki Kanbara (ASTEM), Nagisa Ishiura (Kwansei Gakuin Univ.) VLD2019-111 HWS2019-84 |
This article presents a method for online detection of DC motors' fault based on current signature analysis. While cu... [more] |
VLD2019-111 HWS2019-84 pp.101-106 |
| HWS, VLD [detail] | 2020-03-05 10:55 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Fault-tolerant Design for Memristor Neural Network Using Checksum and Online Testing Mamoru Ishizaka, Michihiro Shintani, Michiko Inoue (NAIST) VLD2019-112 HWS2019-85 |
[more] | VLD2019-112 HWS2019-85 pp.107-112 |
| HWS, VLD [detail] | 2020-03-05 11:20 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
stochasitc fast estimation of timing error induced circuit lifetime distribution Hazuki Tomiyama, Yutaka Masuda, Tohru Ishihara (Nagoya Univ.) VLD2019-113 HWS2019-86 |
In VLSI design, a designer needs the integrated circuit to keep correct operation under area, power, and performance co... [more] |
VLD2019-113 HWS2019-86 pp.113-118 |
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