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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| NS | 2012-05-17 15:00 |
Tokyo | National Institute of Informatics | A Performance Evaluation of TCP-FSO over Free-Space Optical Link Yohei Hasegawa, Yasuhiro Mizukoshi (NEC Corp.), Yoshihisa Takayama, Morio Toyoshima (NICT)  NS2012-19 |
In this paper, we discuss field test results of TCP-FSO which is a customized transport protocol for Free-Space-Optical ... [more] | NS2012-19 pp.17-22 |
| IN, NS (Joint) |
2011-03-04 14:10 |
Okinawa | Okinawa Convention Center | Prototype of Reliable Transport mechanism for Supervisory Control and Data Acquisition Systems Tomohiko Yagyu, Ichiro Yamaguchi, Yohei Hasegawa, Norihito Fujita, Masahiro Jibiki, Hidenori Waragai, Reiko Matsushima (NEC) NS2010-291 |
This paper describes an overview of reliable and real-time datagram protocol (R2DP) for remote supervisory control and... [more] | NS2010-291 pp.729-734 |
| RECONF | 2008-09-26 11:00 |
Okayama | Okayama Univ. | Practice Evaluation Dynamically Reconfigurable Processor MuCCRA-2β Yoshiki Saito, Masaru Kato, Shotaro Saito, Toru Sano, Keiichiro Hirai, Takashi Nishimura, Takuro Nakamura, Satoshi Tsutsumi, Yohei Hasegawa, Hideharu Amano (Keio Univ.) RECONF2008-34 |
Dynamically Reconfigurable Processing Array (DRPA) have been received an attention as a flexible and efficient off-loadi... [more] | RECONF2008-34 pp.69-74 |
| RECONF | 2008-05-23 09:00 |
Fukushima | The University of Aizu | Designing And Evaluating Dynamically Reconfigurable Processor with Power Gating Technique Yoshiki Saito (Keio Univ.), Toshiaki Shirai (Shibaura Inst.), Takuro Nakamura, Takashi Nishimura, Yohei Hasegawa, Satoshi Tsutsumi (Keio Univ.), Toshihiro Kashima, Mitsutaka Nakata, Seidai Takeda, Kimiyoshi Usami (Shibaura Inst.), Hideharu Amano (Keio Univ.) RECONF2008-10 |
A dynamically reconfigurable processor achieves high performance making the best use of high degree of parallelism with ... [more] | RECONF2008-10 pp.55-60 |
| ICD, IPSJ-ARC | 2008-05-14 15:30 |
Tokyo | A Fine Grain Dynamic Sleep Control Scheme in Superscalar Processor Yu Kojima, Daisuke Ikebuchi, Naomi Seki, Yohei Hasegawa, Hideharu Amano (Keio Univ.), Toshihiro Kashima, Seidai Takeda, Toshiaki Shirai, Mitsutaka Nakata, Kimiyoshi Usami (Shibaura Inst of Tech), Tetsuya Sunada, Jun Kanai, Mitaro Namiki (Tokyo Univ. of Agri & Tech), Masaaki Kondo, Hiroshi Nakamura (Univ. of Tokyo) |
Geyser-0 is a low power MIPS R3000 processor which uses a novel fine grain power gating technique to computational units... [more] | ICD2008-33 pp.87-92 |
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| RECONF, CPSY, VLD, IPSJ-SLDM | 2008-01-16 15:10 |
Kanagawa | Hiyoshi Campus, Keio University | Development of verification and power estimation methodology for circuits with Run Time Power Gating Mitsutaka Nakata, Toshiaki Shirai, Toshihiro Kashima, Seidai Takeda, Kimiyoshi Usami (S.I.T.), Naomi Seki, Yohei Hasegawa, Hideharu Amano (Keio Univ.) VLD2007-111 CPSY2007-54 RECONF2007-57 |
When applying Run-Time Power Gating (RTPG) to a design，logic verification is one of the major problems．Gate-level simula... [more] | VLD2007-111 CPSY2007-54 RECONF2007-57 pp.37-42 |
| RECONF, CPSY, VLD, IPSJ-SLDM | 2008-01-16 15:35 |
Kanagawa | Hiyoshi Campus, Keio University | Physical design and Evaluation of MIPS R3000 processor applying Run Time Power Gating Toshiaki Shirai, Toshihiro Kashima, Seidai Takeda, Mitsutaka Nakata, Kimiyoshi Usami (S.I.T.), Yohei Hasegawa, Naomi Seki, Hideharu Amano (Keio Univ.) VLD2007-112 CPSY2007-55 RECONF2007-58 |
Run Time Power Gating (RTPG) is a technology that reduces leakage power in a temporally/spatially fine-grained manner. T... [more] | VLD2007-112 CPSY2007-55 RECONF2007-58 pp.43-48 |
| RECONF, CPSY, VLD, IPSJ-SLDM | 2008-01-17 11:05 |
Kanagawa | Hiyoshi Campus, Keio University | Implementation of 3-D Dynamically Reconfiguarable Device using Inter-Chip Wireless Communication Shotaro Saito, Yasufumi Sugimori, Yoshinori Kohama, Tadahiro Kuroda, Yohei Hasegawa, Hideharu Amano (Keio Univ.) VLD2007-123 CPSY2007-66 RECONF2007-69 |
This paper describes the physical design and evaluation of 3-D dynamically reconfigurable processor MuCCRA-Cube which co... [more] | VLD2007-123 CPSY2007-66 RECONF2007-69 pp.31-36 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 15:05 |
Fukuoka | Kitakyushu International Conference Center | Redusing Overhead of transferring configuration data on Dynamically Reconfigurable Processor MuCCRA Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio Univ.) RECONF2007-39 |
We have been developing a configurable-reconfigurable dynamically reconfigurable processor called MuCCRA. On the process... [more] | RECONF2007-39 pp.19-24 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 15:45 |
Fukuoka | Kitakyushu International Conference Center | Architecture Exploration Method for Low-Power Dynamically Reconfigurable Processors Yohei Hasegawa, Satoshi Tsutsumi, Vasutan Tunbungheng, Hideharu Amano (Keio Univ.) RECONF2007-40 |
In this paper, we propose a design and evaluation environment for exploring the configurable dynamically reconfigurable ... [more] | RECONF2007-40 pp.25-30 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-21 16:10 |
Fukuoka | Kitakyushu International Conference Center | Power analysis on Dynamic Reconfigurable Processor Takashi Nishimura, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio Univ.) RECONF2007-41 |
Dynamically Reconfigurable Processors have been expected to improve area and power eciency with the time-multiplexed ex... [more] | RECONF2007-41 pp.31-36 |
| RECONF | 2007-09-21 15:45 |
Shiga | Ritsumeikan Univ. Biwako Kusatsu Campus (Shiga) | Dynamic Reconfigurable Processor with direct execution mode Toru Sano, Yohei Hasegawa, Satoshi Tsutsumi, Hideharu Amano (Keio univ) RECONF2007-29 |
Multi-context dynamically reconfigurable processors require configuration data in the context memory to execute. It m... [more] |
RECONF2007-29 pp.83-88 |
| RECONF | 2007-09-21 16:45 |
Shiga | Ritsumeikan Univ. Biwako Kusatsu Campus (Shiga) | An Energy Reduction Technique with Dynamic Frequency Scaling Control for Dynamically Reconfigurable Processor Arrays Satoshi Tsutsumi, Yohei Hasegawa, Takashi Nishimura, Hideharu Amano (Keio Univ.) RECONF2007-31 |
(Advance abstract in Japanese is available) [more] | RECONF2007-31 pp.95-100 |
| RECONF | 2007-05-17 15:10 |
Ishikawa | Kanazawa Bunka Hall | 3-D Dynamically Reconfiguarable Device using Inter-Chip Wireless Communication MuCCRA-Cube Shotaro Saito, Yohei Hasegawa, Yoshinori Kohama, Yasufumi Sugimori, Hideharu Amano (Keio Univ.) RECONF2007-5 |
In typical dynamically reconfiguarable devices, the overhead for programmable wires often forms critical paths by stretc... [more] | RECONF2007-5 pp.25-30 |
| RECONF | 2007-05-18 09:00 |
Ishikawa | Kanazawa Bunka Hall | Techniques to decrease the Configuration Data Transfer Time in Dynamically Reconfigurable Processor MuCCRA Toru Sano, Takuro Nakamura, Satoshi Tsutsumi, Yohei Hasegawa, Hideharu Amano (Keio Univ) RECONF2007-10 |
MuCCRA(Multi-Core Configurable Reconfigurable Architecture) project aims to establish architectural techniques to devel... [more] |
RECONF2007-10 pp.55-60 |
| RECONF | 2007-05-18 09:30 |
Ishikawa | Kanazawa Bunka Hall | Power Reduction of Dynamical Reconfigurable Processor MuCCRA Keiichiro Hirai (Keio Univ.), Seidai Takeda (SIT.), Takashi Nishimura, Youhei Hasegawa, Satoshi Tsutsumi (Keio Univ.), Kimiyoshi Usami (SIT.), Hideharu Amano (Keio Univ.) RECONF2007-11 |
Although dynamically recon gurable processors have received an attention as a cost-e ective o -load engine for mobile d... [more] |
RECONF2007-11 pp.61-66 |
| RECONF | 2007-05-18 10:00 |
Ishikawa | Kanazawa Bunka Hall | MuCCRA-D:A Dynamically Reconfigurable Processor with Directly Interconnected PEs Masaru Kato, Yohei Hasegawa, Hideharu Amano (Keio Univ.) RECONF2007-12 |
MuCCRA-1, the first prototype of MuCCRA(Multi-Core Configurable Reconfigurable Architecture) project, uses a typical i... [more] |
RECONF2007-12 pp.67-72 |
| VLD, CPSY, RECONF, IPSJ-SLDM | 2007-01-18 13:50 |
Tokyo | Keio Univ. Hiyoshi Campus | Implementation of Dynamically Reconfigurable Processor MuCCRA Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsumi, Hiroki Matsutani, Vasutan Tunbunheng, Adepu Parimala, Takashi Nishimura, Masaru Kato, Shotaro Saito, Toru Sano, Naomi Seki, Keiichiro Hirai, Mao KaiYi, Hideharu Amano (Keio Univ.) |
[more] | VLD2006-101 CPSY2006-72 RECONF2006-72 pp.43-48 |
| VLD, CPSY, RECONF, IPSJ-SLDM | 2007-01-18 14:15 |
Tokyo | Keio Univ. Hiyoshi Campus | A Scheduling Algorithm for Multicast Configuration Satoshi Tsutsumi, Vasutan Tunbunheng, Yohei Hasegawa, Hiroki Matsutani, Adepu Parimala, Takuro Nakamura, Takashi Nishimura, Toru Sano, Masaru Kato, Shotaro Saito, Naomi Seki, Keiichiro Hirai, Mao KaiYi, Hideharu Amano (Keio Univ.) |
[more] | VLD2006-102 CPSY2006-73 RECONF2006-73 pp.49-54 |
| RECONF, CPSY, VLD, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2006-11-30 14:20 |
Fukuoka | Kitakyushu International Conference Center | Performance Evaluation of Multi-core DRP for Stream Application Naohiro Katsura, Yohei Hasegawa, Vu Manh Tuan, Hiroki Matsutani, Hideharu Amano (Keio Univ.) |
[more] | RECONF2006-52 pp.49-54 |
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