IEICE Technical Committee Submission System
Conference Schedule
Online Proceedings
[Sign in]
Tech. Rep. Archives
    [Japanese] / [English] 
( Committee/Place/Topics  ) --Press->
 
( Paper Keywords:  /  Column:Title Auth. Affi. Abst. Keyword ) --Press->

Technical Committee on Integrated Circuits and Devices (ICD)  (Searched in: 2016)

Search Results: Keywords 'from:2016-04-14 to:2016-04-14'

[Go to Official ICD Homepage (Japanese)] 
Search Results: Conference Papers
 Conference Papers (Available on Advance Programs)  (Sort by: Date Ascending)
 Results 1 - 16 of 16  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD 2016-04-14
10:10
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] A Cost Effective Test Screening Method on 40-nm 4-Mb Embedded SRAM for Low-power MCU
Yuta Yoshida (RSD), Yoshisato Yokoyama, Yuichiro Ishii (Renesas Electronics), Toshihiro Inada, Koji Tanaka, Miki Tanaka, Yoshiki Tsujihashi (RSD), Koji Nii (Renesas Electronics) ICD2016-1
An embedded single-port SRAM with cost effective test screening circuitry is demonstrated for low-power micr... [more] ICD2016-1
pp.1-6
ICD 2016-04-14
10:35
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] A 7T-SRAM with Data-Write Technique by Capacitive Coupling
Daisaburo Takashima, Masato Endo (Toshiba), Kazuhiro Shimazaki, Manabu Sai (Toshiba Microelectronics), Masaaki Tanino (Toshia Information Systems) ICD2016-2
A 7T-SRAM, in which cell data is written by capacitive coupling, is proposed. The elimination of current-drive in read/w... [more] ICD2016-2
pp.7-12
ICD 2016-04-14
11:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] A 298-fJ/writecycle 650-fJ/readcycle 8T Three-Port SRAM in 28-nm FD-SOI Process Technology for Image Processor
Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta Takagi, Shusuke Yoshimoto, Shintaro Izumi (Kobe Univ.), Koji Nii (Renesas Electronics), Hiroshi Kawaguchi, Masahiko Yoshimoto (Kobe Univ.) ICD2016-3
This paper presents a low-power and low-voltage 64-kb 8T three-port image memory using a 28-nm FD-SOI process technology... [more] ICD2016-3
pp.13-16
ICD 2016-04-14
11:25
Tokyo Kikai-Shinko-Kaikan Bldg. A 64kb 16nm Asynchronous Disturb Current Free 2-Port SRAM with PMOS Pass-Gates for FinFET Technologies
Hidehiro Fujiwara, Li-Wen Wang, Yen-Huei Chen, Koo-Cheng Lin, Dar Sun, Shin-Rung Wu, Jhon-Jhy Liaw, Chin-Yung Lin, Mu-Chi Chiang, Hung-Jen Liao, Shien-Yang Wu, Jonathan Chang (TSMC) ICD2016-4
 [more] ICD2016-4
pp.17-20
ICD 2016-04-14
13:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] Visualization of Filament of ReRAM during Resistive Switching by in-situ Transmission Electron Microscopy
Yasuo Takahashi (Hokkaido Univ.), Masaki Kudo (Kyusyu Univ.), Masashi Arita (Hokkaido Univ.) ICD2016-5
Resistive random access memories (ReRAMs) have been investigated as a next generation non-volatile memory, where 16-Gbit... [more] ICD2016-5
pp.21-26
ICD 2016-04-14
13:25
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] A 0.6V Operation ReRAM Program Voltage Generator with Adaptively Optimized Comparator Bias-Current for Batteryless IoT Local Device
Masahiro Tanaka, Tomoya Ishii, Shogo Hachiya, Sheyang Ning, Ken Takeuchi (Chuo Univ.) ICD2016-6
Resistive RAM (ReRAM) is considered as candidates for batteryless IoT local device because of the low voltage and low po... [more] ICD2016-6
pp.27-32
ICD 2016-04-14
13:50
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] Reliability Projecting for ReRAM based on Stochastic Differential Equation
Zhiqiang Wei (PSCS), Koji Eriguchi (Kyoto Univ.), Shunsaku Muraoka, Koji Katayama, Ryotaro Yasuhara, Kawai Ken, Yukio Hayakawa, Kazuhiko Shimakawa, Takumi Mikawa, Yoneda Shinichi (PSCS) ICD2016-7
An analytic formula based on stochastic differential equation is successfully developed to describe intrinsic ReRAM vari... [more] ICD2016-7
pp.33-37
ICD 2016-04-14
14:15
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] ReRAM reliability characterization and improvement by machine learning
Tomoko Ogura Iwasaki, Sheyang Ning, Hiroki Yamazawa, Chao Sun, Shuhei Tanakamaru, Ken Takeuchi (Chuo Univ.) ICD2016-8
The low voltage and fast program capability of ReRAM is very attractive for next-generation memory applications, but the... [more] ICD2016-8
pp.39-44
ICD 2016-04-14
14:50
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] A Triple-Protection Structured COB FRAM with 1.2-V Operation and 1E17-Cycle Endurance
Hitoshi Saito, Ko Nakamura, Soichiro Ozawa, Naoya Sashida, Satoru Mihara, Yukinobu Hikosaka, Wensheng Wang, Tomoyuki Hori, Kazuaki Takai, Mitsuharu Nakazawa, Noboru Kosugi, Makoto Hamada, Shoichiro Kawashima, Takashi Eshita, Masato Matsumiya (FSL) ICD2016-9
We have developed a ferroelectric RAM (FRAM) with a low operation voltage of 1.2 V and a high switching endurance up to ... [more] ICD2016-9
pp.45-49
ICD 2016-04-14
15:15
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] 1T1MTJ STT-MRAM Cell Array Design with an Adaptive Reference Voltage Generator
Hiroki Koike, Sadahiko Miura, Hiroaki Honjo, Tosinari Watanabe, Hideo Sato, Soshi Sato, Takashi Nasuno, Yasuo Noguchi, Mitsuo Yasuhira, Takaho Tanigawa, Masaaki Niwa, Kenchi Ito, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh (Tohoku Univ.) ICD2016-10
A device-variation-tolerant spin-transfer-torque magnetic random access memory (STT-MRAM) cell array with a high-signal-... [more] ICD2016-10
pp.51-56
ICD 2016-04-14
15:50
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] Power reduction based on MRAM
Hiroaki Yoda, Shinobu Fujita (toshiba) ICD2016-11
 [more] ICD2016-11
pp.57-59
ICD 2016-04-14
16:15
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Technology trends and near-future applications of embedded STT-MRAM
Shinobu Fujita (Toshiba) ICD2016-12
 [more] ICD2016-12
pp.61-64
ICD 2016-04-15
09:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] Faster LBA scrambler utilized SSD with Garbage Collection Optimization
Chihiro Matsui, Asuka Arakawa, Chao Sun, Tomoko Ogura Iwasaki, Ken Takeuchi (Chuo Univ.) ICD2016-13
(To be available after the conference date) [more] ICD2016-13
pp.65-69
ICD 2016-04-15
09:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] Design of SCM/NAND Flash Hybrid SSD System for Each Data Access Pattern
Tomoaki Yamada, Shun Okamoto, Chao Sun, Shogo Hachiya, Tomoko Ogura Iwasaki, Ken Takeuchi (Chuo Univ.) ICD2016-14
 [more] ICD2016-14
pp.71-76
ICD 2016-04-15
10:20
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] Highly Reliable Method for Long-Term Semiconductor Data Storage
Tomonori Takahashi, Senju Yamazaki, Shuhei Tanakamaru, Tomoko Ogura Iwasaki, Shogo Hachiya, Ken Takeuchi (Chuo Univ.)
 [more]
ICD 2016-04-15
10:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] A 90nm Embedded 1T-MONOS Flash Macro for Automotive Applications with 0.07mJ/8kB Rewrite Energy and Endurance Over 100M Cycles Under Tj of 175°C
Satoru Nakanishi, Hidenori Mitani, Ken Matsubara, Hiroshi Yoshida, Takashi Kono, Yasuhiko Taito, Takashi Ito, Takashi Kurafuji, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi (Renesas) ICD2016-15
A first-ever 90nm embedded 1T-MONOS Flash macro is presented to realize automotive reliability and simple process integr... [more] ICD2016-15
pp.77-81
 Results 1 - 16 of 16  /   
Choose a download format for default settings. [NEW !!]
Text format pLaTeX format CSV format BibTeX format
Copyright and reproduction : All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan