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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF, VLD | 2024-01-29 14:40 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
 VLD2023-85 RECONF2023-88 |
We are developing a signal processing ASIC designed to operate at extremely low temperatures with the goal of realizing ... [more] | VLD2023-85 RECONF2023-88 pp.31-34 |
| NC, NLP (Joint) |
2016-01-28 15:00 |
Fukuoka | Kyushu Institute of Technology | Off-Chip Learning Algorithm for Hardware Hand-Sign Recognition System Masayuki Tamaki, Hikawa Hiroomi (Kansai Univ) NC2015-57 |
This paper discusses a new off-chip learning algorithm for hardware hand sign recognition system. The hand sign recogni... [more] |
NC2015-57 pp.7-12 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 14:15 |
Fukuoka | Kyushu University | An FPGA Implementation of CRC Slicing-by-N algorithms Amila Akagic, Hideharu Amano (Keio Univ.) RECONF2010-42 |
Cyclic Redundancy Check (CRC) is an error detection scheme that detects corruption of digital content during data transm... [more] | RECONF2010-42 pp.19-24 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-26 13:55 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Computer Aided Detection System Implementation for recognize cancer in Mammograms over a FPGA Yessica Suarez Henandez (IPN/Univ. of Electro-Comm.), Sayaka Akioka, Tsutomu Yoshinaga, Volodymyr Ponomaryov, Gonzalo Duchen Sanchez (Univ. of Electro-Comm.) VLD2009-77 CPSY2009-59 RECONF2009-62 |
A Computer Aided Detection, CAD, system was implemented using a FPGA development board to recognize cancer in Mammogram.... [more] | VLD2009-77 CPSY2009-59 RECONF2009-62 pp.47-52 |
| DC | 2009-06-19 13:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Talk]
High-level Design for Test Tools & Industrial Design Flows Chouki Aktouf (DeFacTo) DC2009-14 |
Design for Testability at Register Transfer Level has been widely explored by academia. Commercial tools start to be co... [more] |
DC2009-14 pp.25-28 |
| DC | 2009-02-16 11:30 |
Tokyo | Decimal adder using abacus architecture and its application to residue arithmetic Tadahito Iijima, Shugang Wei (Gunma Univ.) DC2008-71 |
In a decimal number system, arithmetic circuits are implemented by using the binary number representations well known as... [more] | DC2008-71 pp.19-23 |
|
| ET | 2008-12-13 09:50 |
Miyazaki | Development of FPGA-based training system for logical circuit design Kei Odai, Keiichi Komatsu (Shohoku Col.) ET2008-59 |
We developed an FPGA-based training system for logical circuit design. This training system is used for the education of... [more] | ET2008-59 pp.7-10 |
|
| NC | 2008-11-08 10:30 |
Saga | Saga Univ. | Automatic generation of self organizing map hardware Akira Onoo (Oita Univ.), Hiroomi Hikawa (Kansai Univ.) NC2008-65 |
This paper discusses the development of hardware Self-Organizing Map (SOM) generator, which generates VHSIC Hardware Des... [more] | NC2008-65 pp.37-42 |
| CPM, ICD | 2008-01-18 09:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg | Arithmetic operation circuit based on abacus architecture Syunsuke Nagasawa, Shugang Wei (Gunma Univ) CPM2007-137 ICD2007-148 |
In arithmetic circuits, the carrying propagation limits the operation speed. To shorten the length of the carrying pr... [more] |
CPM2007-137 ICD2007-148 pp.53-58 |
| EMT, OPE, MW | 2007-08-02 09:50 |
Hokkaido | Muroran Institute of Technology | Conceptual Design of Dedicated Computer for Time Domain Boundary Element Method Hideki Kawaguchi (Muroran IT), Kazuhiro Fujita (Hokkaido Univ.) MW2007-44 OPE2007-31 |
Authors have been working in development of time domain boundary element method for particle accelerator wake field anal... [more] | MW2007-44 OPE2007-31 pp.13-18 |
| VLD, CPSY, RECONF, IPSJ-SLDM | 2007-01-17 14:50 |
Tokyo | Keio Univ. Hiyoshi Campus | Design of Residue Dividers Using Signed-Digit Number Residue Addition Peng Jia, Shugang Wei (Gunma Univ.) |
(To be available after the conference date) [more] | VLD2006-88 CPSY2006-59 RECONF2006-59 pp.19-24 |
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