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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 12 of 12  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
EMT, EST, LQE, MWP, OPE, PEM, PN, IEE-EMT [detail] 2018-01-25
10:45
Hyogo   Development of a semi-implicit FDTD method in cylindrical coordinates and its extension to a frequency-dependent version
Masato Ito, Jun Shibayama, Junji Yamauchi, Hisamatsu Nakano (Hosei Univ.) PN2017-55 EMT2017-92 OPE2017-133 LQE2017-115 EST2017-91 MWP2017-68
 [more] PN2017-55 EMT2017-92 OPE2017-133 LQE2017-115 EST2017-91 MWP2017-68
pp.93-97
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-19
10:40
Kanagawa Raiosha, Hiyoshi Campus, Keio University Design and Implementation of 176-MHz WXGA 30-fps Real-time Optical Flow Processor
Satoshi Kanda, Yu Suzuki, Masato Ito (Nihon Univ.), Kousuke Imamura, Yoshio Matsuda (Kanazawa Univ.), Tetsuya Matsumura (Nihon Univ.) VLD2017-79 CPSY2017-123 RECONF2017-67
This paper describes the design and implementation of a real-time optical flow processor using a single field-programmab... [more] VLD2017-79 CPSY2017-123 RECONF2017-67
pp.101-106
MWP, OPE, EMT, MW, EST, IEE-EMT [detail] 2017-07-20
13:55
Hokkaido Obihiro Chamber of Commerce and Industry EMT2017-16 MW2017-41 OPE2017-21 EST2017-18 MWP2017-18 Since the finite-difference time-domain (FDTD) method is an explicit scheme, a time step size ($Delta{t}$) is restricted... [more] EMT2017-16 MW2017-41 OPE2017-21 EST2017-18 MWP2017-18
pp.55-60
MI 2017-07-06
16:15
Miyagi Tohoku Univ. An Automated Method for Generating Training Data for Image Registration Using Deep Learning
Masato Ito, Fumihiko Ino, Kenichi Hagihara (Osaka Univ.) MI2017-28
In this paper, we propose an automated method for generating training data that realizes image registration with deep le... [more] MI2017-28
pp.11-16
VLD, CAS, MSS, SIP 2016-06-17
10:30
Aomori Hirosaki Shiritsu Kanko-kan An FPGA Implementation of Real-time Optical Flow Estimation Processor
Yu Suzuki, Masato Ito, Satoshi Kanda, Tetsuya Matsumura (Nihon Univ.), Kousuke Imamura, Yoshio Matsuda (Kanazawa Univ.) CAS2016-21 VLD2016-27 SIP2016-55 MSS2016-21
A real-time optical flow processor has been implemented using single FPGA chip. By introducing four effective methods, m... [more] CAS2016-21 VLD2016-27 SIP2016-55 MSS2016-21
pp.115-120
VLD 2015-03-02
14:55
Okinawa Okinawa Seinen Kaikan Symmetrical Routing based on Set-pair Routing and Mixed Integer Programming
Masato Ito, Qing Dong, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2014-157
This paper proposes a routing algorithm of high routability focusing on symmetrical routing used in analog layout. In a ... [more] VLD2014-157
pp.25-30
SCE 2013-01-24
11:20
Okayama Okayama Univ. [Invited Talk] Analysis of Interference for Low-Voltage-Driven SFQ Circuits
Takumi Takinami, Masato Ito, Atsushi Kitayama, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2012-30
We have analyzed the interference for low-voltage-driven SFQ circuits used by measurement and simulation. We study low-v... [more] SCE2012-30
pp.31-35
SCE 2012-07-19
13:10
Tokyo Kikai-Shinko-Kaikan Bldg. Study on Passive Transmission Lines Used in Low-Voltage-Biased RSFQ Circuit
Takumi Takinami, Masato Ito, Atsushi Kitayama, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2012-13
 [more] SCE2012-13
pp.25-30
SCE 2011-07-13
16:05
Tokyo Kikai-Shinko-Kaikan Bldg. Nano-watt demonstration of single-flux-quantum circuits
Atsushi Kitayama, Masato Ito, Tomohito Kouketsu, Tetsuya Kusumoto, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2011-10
We have demonstrated rapid-single-flux-quantum (RSFQ) circuits with reduced power consumptions by lowering bias voltages... [more] SCE2011-10
pp.53-58
SR 2011-01-28
10:00
Fukuoka Kyushu Institute of Technology Performance Optimization of A Heterogeneous Wireless Network Aggregation Method on Real Network Environment
Masato Ito, Kazuki Hashiguchi, Yousuke Kon, Mikio Hasegawa (TUS), Kentaro Ishizu, Hiroshi Harada (NICT) SR2010-78
In this paper, performance of the heterogeneous wireless link aggregation of the real wireless networks is optimized, by... [more] SR2010-78
pp.49-56
SCE 2010-10-19
15:35
Tokyo Kikai-Shinko-Kaikan Bldg. Demonstration of a 2x2 Single-Flux-Quantum Reconfigurable Data-Path Based on the 10-kA/cm2 Process
Masakazu Okada, Irina Kataeva, Masato Ito, Masamitsu Tanaka, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Shuuichi Nagasawa (ISTEC), Naofumi Takagi (Kyoto Univ.) SCE2010-33
We have demonstrated a reconfigurable data-path (RDP) prototype using the single-flux-quantum (SFQ) circuits fabricated ... [more] SCE2010-33
pp.55-60
SCE 2010-07-22
13:40
Tokyo Kikai-Shinko-Kaikan Bldg. Demonstration of a 4x4 SFQ switch fabricated with the ISTEC 10-kA/cm2 Nb Advanced process 2
Masato Ito, Irina Kataeva, Masakazu Okada, Tomohito Kouketsu, Masamitsu Tanaka, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.) SCE2010-21
We have evaluated the performance of the 4×4 SFQ switch which was designed and fabricated using ISTEC Advanced process ... [more] SCE2010-21
pp.41-46
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