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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, CPSY, CAS | 2017-12-15 12:00 |
Okinawa | Art Hotel Ishigakijima | A faster searching method for polyhedral packing problem Yutaka Matsushita, Kunihiro Fujiyoshi (TUAT)  CAS2017-108 ICD2017-96 CPSY2017-105 |
Polyhedral packing problem is to pack given polyhedrons consisting of only planes perpendicular to one of x, y or z in a... [more] | CAS2017-108 ICD2017-96 CPSY2017-105 pp.181-186 |
| VLD | 2014-03-04 09:40 |
Okinawa | Okinawa Seinen Kaikan | An Effective Solution Space for Simulated Annealing Hiroshi Tezuka, Kunihiro Fujiyoshi (TUAT) VLD2013-143 |
Simulated Annealing is a universal probabilistic metaheuristic for the general optimization problem of locating a good a... [more] | VLD2013-143 pp.55-60 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-27 10:50 |
Kagoshima | Adjacent Common Centroid Placement for Analog IC Layout Design Kenichiro Murotatsu, Kunihiro Fujiyoshi (TUAT) VLD2013-63 DC2013-29 |
To improve immunity against process gradients, common centroid constraints, in which every pair of capacitors should be... [more] | VLD2013-63 DC2013-29 pp.13-18 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-28 09:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | On Handling Cell Placement with Adjacent Common Centroid Constraints for Analog IC Layout Design Kunihiro Fujiyoshi, Keitaro Ue (TUAT) VLD2012-88 DC2012-54 |
(To be available after the conference date) [more] | VLD2012-88 DC2012-54 pp.165-170 |
| VLD | 2010-09-28 10:00 |
Kyoto | Kyoto Institute of Technology | A Method of Analog IC Placement with Common Centroid Constraints Keitaro Ue, Kunihiro Fujiyoshi (TUAT) VLD2010-48 |
Monolithic IC has a characteristic that absolute error of device parameter is large but relative variability is small. ... [more] |
VLD2010-48 pp.37-42 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 14:30 |
Fukuoka | Kitakyushu Science and Research Park | On Handling Cell Placement with Exclusive Adjacent Symmetry Constraints for Analog IC Layout Design Shimpei Asano, Kunihiro Fujiyoshi (Tokyo University of Agriculture and Technology) VLD2008-71 DC2008-39 |
(To be available after the conference date) [more] | VLD2008-71 DC2008-39 pp.67-72 |
| WIT | 2008-03-22 13:35 |
Fukuoka | Kitakyushu Science and Research Park | Context-oriented Layout Optimization for Large Print Textbooks Itaru Tatsumi, Hitoshi Habe, Masatsugu Kidode (NAIST) WIT2007-96 |
Large print textbooks are used by low vision students in schools. Because it is mainly made by volunteers and almost ... [more] |
WIT2007-96 pp.31-36 |
| CS, SIP, CAS | 2008-03-07 09:50 |
Yamaguchi | Yamaguchi University | Improved Method of Multi-Branched Bus Driven Floorplanning Yosuke Taira, Kunihiro Fujiyoshi (TUAT) CAS2007-132 SIP2007-207 CS2007-97 |
sequence-pair, バスドリブン, フロアプラン設計, 増加部分列, 減少部分列 sequence-pair, Bus-driven, floorplanning, increasing subsequence, decre... [more] |
CAS2007-132 SIP2007-207 CS2007-97 pp.41-46 |
| VLD, ICD | 2008-03-05 15:20 |
Okinawa | TiRuRu | Analog Floorplan with Soft-Module Configuration Kentarou Murata, Kazuya Sasaki, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) VLD2007-142 ICD2007-165 |
In MOS analog design, the transistor size is increasing as the supply voltage becomes lower, and the layout configurat... [more] |
VLD2007-142 ICD2007-165 pp.31-36 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-22 13:00 |
Fukuoka | Kitakyushu International Conference Center | Necessary and Sufficient Conditions for Symmetry Placements Kunihiro Fujiyoshi, Chikaaki Kodama, Shinichi Koda (TUAT) |
(To be available after the conference date) [more] | VLD2007-95 DC2007-50 pp.37-41 |
| ICD, VLD | 2007-03-08 14:30 |
Okinawa | Mielparque Okinawa | Relocation Method for Circuit Modification Kunihiko Yanagibashi, Yasuhiro Takashima (Univ. of Kitakyushu), Yuichi Nakamura (NEC) |
In this paper, we propose a novel migration method when the circuit with its placement is modified. In the method, its ... [more] | VLD2006-133 ICD2006-224 pp.85-90 |
| SIP, CAS, CS | 2007-03-05 15:10 |
Tottori | Blancart Misasa (Tottori) | Evaluation and Discussion on Module Placement using Wire Length Aware Partially Ordered Sequence-Pair Yuuki Yano, Mineo Kaneko (JAIST) CAS2006-88 SIP2006-189 CS2006-105 |
In the module placement problem, the code representation of a placement called sequence-pair, and simulated annealing se... [more] | CAS2006-88 SIP2006-189 CS2006-105 pp.63-68 |
| SIP, CAS, VLD | 2006-06-22 16:15 |
Hokkaido | Kitami Institute of Technology | Re-placement Method for Circuit Modification Kunihiko Yanagibashi, Yasuhiro Takashima (Univ. of Kitakyushu) |
This paper proposes a re-placement method for circuit modification．The re-placement is required to realize a placement w... [more] | CAS2006-7 VLD2006-20 SIP2006-30 pp.35-40 |
| COMP | 2005-04-18 10:35 |
Hyogo | Kwansei Gakuin Univ. | Exact Algorithms for the Two-Dimensional Strip Packing Problem with Rotations Mitsutoshi Kenmochi, Takashi Imamichi, Koji Nonobe, Mutsunori Yagiura, Hiroshi Nagamochi (Kyoto Univ.) |
We examine various strategies for exact approaches to the 2-dimensional strip packing problem (2SP) with and without rot... [more] | COMP2005-2 pp.5-14 |
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