Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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RECONF2010-39
Circuit Generation using High-Level Synthesis Tool in Reconfigurable HPC System Based on FPGA Arrays
Kenichi Takahashi, Jiang Li, Hiroki Isogai, Hiroki Banba, Hakaru Tamukoh, Masatoshi Sekine (TUAT)
pp. 1 - 6
RECONF2010-40
OS Functions for a Distributed FPGA Cluster System using Ethernet
Akira Kojima, Takahiro Kajiyama, Tetsuo Hironaka (Hiroshima City Univ.)
pp. 7 - 12
RECONF2010-41
On a Prefetching Heterogeneous MDD Machine
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura (KIT)
pp. 13 - 18
RECONF2010-42
An FPGA Implementation of CRC Slicing-by-N algorithms
Amila Akagic, Hideharu Amano (Keio Univ.)
pp. 19 - 24
RECONF2010-43
A case study of efficient task scheduling for FPGA-based partially reconfigurable systems
Yoshiaki Tsutsumi, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.)
pp. 25 - 30
RECONF2010-44
Power-Consumption-Evaluation on the Pattern-Recognition Machine Using Data-Direct-Implementation Approach
Yusuke Sato, Moritoshi Yasunaga, Noriyuki Aibe (Univ. of Tsukuba)
pp. 31 - 36
RECONF2010-45
Fabrication in Low Power Process and Evaluation of Power Reconfigurable Field Programmable Gate Array
Masakazu Hioki (AIST), Takashi Kawanami (KIT), Yohei Matsumoto (TUMSAT), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST)
pp. 37 - 42
RECONF2010-46
Magnetic Field Measurement for Side-channel Analysis Environment
Toshihiro Katashita, Yohei Hori, Akashi Satoh (AIST)
pp. 43 - 48
RECONF2010-47
An Effective Processing Method for Parallel Loops on FPGA with PCI-Express
Koichi Araki, Yukinori Sato, Yasushi Inoguchi (JAIST)
pp. 49 - 54
RECONF2010-48
A study of the success rate of MIA under various probability density function estimations
Yohei Hori (AIST), Takahiro Yoshida (Aoyama Univ.), Toshihiro Katashita, Akashi Satoh (AIST)
pp. 55 - 60
RECONF2010-49
Performance Evaluation for PUF-based Authentication Systems with Shift Post-processing
Hyunho Kang, Yohei Hori, Toshihiro Katashita, Akashi Satoh (AIST)
pp. 61 - 64
RECONF2010-50
[Invited Talk]
Monolithic 3D-FPGA with TFT SRAM over 90nm 9 layer Cu CMOS
Tatasuya Naito, Tatsuya Ishida (Toshiba), Takeshi Onoduka (Covalent Materials), Masahito Nishigoori, Takeo Nakayama, Yoshihiro Ueno, Yasumi Ishimoto, Akihiro Suzuki, Chung Weicheng (Toshiba), Raminda Madurawe (readyASIC), Sheldon Wu (China International Intellectual Property Services), Shu Ikeda (tei Solutions), Hisato Oyamatsu (Toshiba)
pp. 65 - 69
RECONF2010-51
An FPGA Implementation of Face Detection Recognition System for automobile using Impulse C
Takaaki Miyajima (Keio Univ.), Masatoshi Arai (Calsonic), Hideharu Amano (Keio Univ.)
pp. 71 - 76
RECONF2010-52
FPGA Accelaration Default Intensity Model
Takaaki Yokoyama, Hideharu Amano (Keio Univ.)
pp. 77 - 82
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.