Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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CPSY2012-85
Power optimization of micro-controller with Sillicon on Thin Buried Oxide
Kuniaki Kitamori, Weihan Wang, Hongliang Su, Hideharu Amano (Keio Univ.)
pp. 199 - 204
CPSY2012-86
Guarantee of finising of calculate for a low power accelerator CMA
Akihito Tsusaka, Mai Izawa, Rie Uno, Nobuaki Ozaki, Hideharu Amano (Keio Univ.)
pp. 205 - 210
CPSY2012-87
A development and evaluation of the normally-off sensor node for low-power operation.
Kazuho Nakagawa, Ryohei Hori, Takeshi Kumaki, Masahumi Kimata, Takeshi Fujino (Ritsumeikan Univ.)
pp. 211 - 216
CPSY2012-88
A Temperature-Aware DVFS Control on Imprecise Computation Model
Keigo Mizotani, Rikuhei Ueda, Masayoshi Takasu, Hiroyuki Chishiro, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.)
pp. 217 - 222
CPSY2012-89
Extention of Device Management System for Multi-Root Share of Single Root I/O Virtualization(SR-IOV) PCIe Device
Yuki Hayashi, Junichi Higuchi, Jun Suzuki, Takashi Yoshikawa (NEC)
pp. 223 - 228
CPSY2012-90
Implementation and evaluation of a morphological pattern spectrum using an highly-parallel SIMD matrix core
Yasushi Tsukada, Tomohiro Takeda, Toshiya Honda, Takeshi Kumaki, Takeshi Ogura, Takeshi Fujino (Ritsumeikan Univ.)
pp. 229 - 234
CPSY2012-91
A Dynamic Reconfiguration Scheme of Channel Coding on Responsive Link
Akihiro Takahashi, Yusuke Kumura, Osamu Yoshizumi, Kazutoshi Suito, Hiroki Matsutani, Nobuyuki Yamasaki (Keio Univ.)
pp. 235 - 240
CPSY2012-92
Development of Visualization Tools for Cloud System Management
Hideharu Ochiai, Eiichi Hayakawa (Takushoku Univ)
pp. 241 - 246
CPSY2012-93
Asynchronous Memory Machine Models with Barrier Synchronization
Koji Nakano (Hiroshimna Univ.)
pp. 247 - 252
CPSY2012-94
Evaluation Environment for Configuration of Floating-Point Unit Arrays
Yuya Itoh, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.)
pp. 253 - 258
CPSY2012-95
Proposal Security Barrier Device for Control System Security
Kenji Toda, Ichiro Ebihara, Koji Segawa, Koichi Takahashi, Osamu Morikawa, Kazukuni Kobara (AIST)
pp. 259 - 264
CPSY2012-96
Development of High Speed Network Intrusion Detection System with High Scalability Using High-performance FPGA
Mamoru Sekiyama, Kenji Toda, Tetsuo Kotoku (AIST)
pp. 265 - 269
CPSY2012-97
Towards Demonstration of a Dependable Network-on-Chip Platform for an Automotive Application
Kazuki Nakai, Chammika Mannakkara, Vijay Holimath, Tomohiro Yoneda (NII)
pp. 271 - 276
CPSY2012-98
Self-Checking Carry Look-ahead Adder by Carry-bit Duplication
Akihiro Mitoma (Kyoto Univ.), Nobutaka Kito (Chukyo Univ.), Naofumi Takagi (Kyoto Univ.)
pp. 277 - 282
CPSY2012-99
Multiplier with concurrent error detection by particial duplication
Kazushi Akimoto (Kyoto Univ.), Nobutaka Kito (Cyukyo Univ.), Naofumi Takagi (Kyoto Univ.)
pp. 283 - 287
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.