Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380
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VLD2012-1
Task Allocation Optimization Method Using SA Method to Automatically Set Starting Temperature for Multi-Processor System
Yuichiro Yanabu, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai (Osaka Univ.)
pp. 1 - 6
VLD2012-2
Multiple supply voltages aware high-speed and high-efficient high-level synthesis for HDR architectures
Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa (Waseda Univ.)
pp. 7 - 12
VLD2012-3
Write Control Method Based on State Transition for Magnetic Flip-Flop
Naoya Okada (Waseda Univ.), Yuichi Nakamura (NEC), Shinji Kimura (Waseda Univ.)
pp. 13 - 18
VLD2012-4
High-level Design Debugging Using Potential Dependence
Shohei Ono, Takeshi Matsumoto, Masahiro Fujita (Univ. of Tokyo)
pp. 19 - 24
VLD2012-5
[Invited Talk]
How to Mitigate Reliability-related Issues on Nano-scaled LSIs
Kazutoshi Kobayashi (KIT)
pp. 25 - 30
VLD2012-6
Sub-path delay estimation for reconvergent path
Seiya Nagatsuka, Yasuhiro Takashima (Univ. of Kitakyushu)
pp. 31 - 36
VLD2012-7
A Placement Method on Overlapped Printed-Wiring-Boards
Tetsuya Matsuura, Kunihiro Fujiyoshi (TUAT)
pp. 37 - 42
VLD2012-8
A Comparator Energy Model Considering Shallow Trench Isolation by Geometric Programming
Gong Chen, Yu Zhang, Bo Yang, Qing Dong, Shigetoshi Nakatake (Kitakyushu Univ.)
pp. 43 - 48
VLD2012-9
Development of an FPGA Design Support Tool Set for Asynchronous Circuits with Bundled-data Implementation
Keitaro Takizawa, Minoru Iizuka, Hiroshi Saito (Univ. of Aizu)
pp. 49 - 54
VLD2012-10
Statistical Analysis and its Hardware Implementation on Simulation Results of Systems with Uncertain Inputs
Kosuke Oshima, Shohei Ono, Takeshi Matsumoto, Masahiro Fujita (Univ. of Tokyo)
pp. 55 - 60
Note: Each article is a technical report without peer review, and its polished version will be published elsewhere.