Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SCE |
2019-10-10 10:50 |
Miyagi |
|
Study of method to evaluate energy dissipation of arbitrary adiabatic quantum-flux-parametron logic gates Taiki Yamae, Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-28 |
Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor logic. It operates with zero static... [more] |
SCE2019-28 pp.31-36 |
SCE |
2019-04-19 09:30 |
Tokyo |
|
Design and demonstration of an adiabatic-quantum-flux-parametron field-programmable gate array using Josephson-CMOS hybrid memories Yukihiro Okuma, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nat. Univ.) SCE2019-1 |
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient high-performance in... [more] |
SCE2019-1 pp.1-6 |
SCE |
2018-10-11 10:50 |
Miyagi |
|
Investigation of Multi-Phase Timing Windows for Adiabatic Quantum-Flux-Parametron Logic Christopher Ayala, Olivia Chen, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2018-23 |
AQFP (adiabatic quantum-flux-parametron) logic holds promise towards building energy efficient computing systems with bi... [more] |
SCE2018-23 pp.37-40 |
SCE |
2018-10-11 11:15 |
Miyagi |
|
Area reduction of logic circuits using asymmetry AQFP gates and their demonstration Yukihiro Okuma, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2018-24 |
Adiabatic quantum-flux-parametron (AQFP) circuits are expected as future energy-efficient high-performance information p... [more] |
SCE2018-24 pp.41-45 |
SCE |
2018-01-31 13:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Proposal of Parallel to Serial Conversion Circuit for 2-Dimension Superconductive Detector Array using Adiabatic Quantum-Flux-Parametron Fumihiro China, Naoki Takeuchi (YNU), Thomas Ortlepp (The CiS), Yuki Yamanashi, Nobuyuki Yoshikawa (YNU) SCE2017-37 |
Adiabatic quantum-flux-parametron (AQFP) can achieve extremely low power compared to semiconductor technology by using s... [more] |
SCE2017-37 pp.33-38 |
SCE |
2017-10-05 11:15 |
Miyagi |
|
Proposal of Parallel to Serial Conversion Circuit for 2-Dimension Superconductive Detector Array using Adiabatic Quantum-Flux-Parametron Fumihiro China, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (YNU) SCE2017-29 |
Recently, the superconducting qubits and detectors have been studied well in fields such as quantum computing, quantum o... [more] |
SCE2017-29 pp.41-46 |
SCE |
2017-08-09 11:25 |
Aichi |
Nagoya Univ. (Higashiyama Campus) |
Energy evaluation of the feedback latch using AQFP logic Mai Nozoe, Naoki Takeuti, Christopher Ayala, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2017-12 |
We are studying adiabatic quantum flux parametron (AQFP), which is an ultra-low-power superconductor device. We have bee... [more] |
SCE2017-12 pp.7-12 |
SCE |
2017-08-09 13:20 |
Aichi |
Nagoya Univ. (Higashiyama Campus) |
Evaluation of a random access memory cell composed of quantum flux parametron Hiroshi Takayama, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama National Univ.) SCE2017-14 |
Adiabatic quantum-flux-parametron (AQFP) logic has a potential to become a basic technology to realize an ultra-low-powe... [more] |
SCE2017-14 pp.19-23 |
SCE |
2017-04-21 10:25 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Design of Power Divider For AQFP logic Yuge Xing, Naoki Takeuchi, Yuki Yamanashi, Nobuyuki Yoshikawa (Yokohama Nat. Univ.) SCE2017-2 |
We have been investigating adiabatic-quantum-flux-parametron (AQFP) logic as an ultra-low power logic circuit with zero ... [more] |
SCE2017-2 pp.7-11 |
ICD, CPM, ED, EID, EMD, MRIS, OME, SCE, SDM, QIT (Joint) [detail] |
2017-01-31 09:15 |
Hiroshima |
Miyajima-Morino-Yado(Hiroshima) |
[Invited Talk]
Ultra-low-power adiabatic superconducting integrated circuits Nobuyuki Yoshikawa (Yokohama Nat. Univ.) EMD2016-77 MR2016-49 SCE2016-55 EID2016-56 ED2016-120 CPM2016-121 SDM2016-120 ICD2016-108 OME2016-89 |
This article reviews recent research developments of extremely-energy-efficient adiabatic superconducting logic circuits... [more] |
EMD2016-77 MR2016-49 SCE2016-55 EID2016-56 ED2016-120 CPM2016-121 SDM2016-120 ICD2016-108 OME2016-89 pp.39-44 |
SCE |
2015-08-05 10:00 |
Kanagawa |
Yokohama National Univ. |
Design of an Extremely Energy-Efficient Hardware Algorithm Using Adiabatic Superconductor Logic and Its Digital Modeling Approach Qiuyun Xu, Christopher L. Ayala, Naoki Takeuchi, Thomas Ortlepp, Yuki Yamanashi, Nobuyuki Yoshikawa (Yohohama Natl. Univ.) SCE2015-16 |
[more] |
SCE2015-16 pp.47-51 |