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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| OPE, OFT, OCS (Joint) [detail] |
2024-02-21 16:15 |
Okinawa | Nobumoto Ohama Memorial Hall (Primary: On-site, Secondary: Online) |
Field Trial of Short Distance Transmission Designing Method based on Gaussian Noise Model and Evaluation of Designing Method Implementation towards Commercial Network Deployment Shu Kimura, Xiaocheng Zhang, Kohei Tamesue (NTT Communications), Toru Mano (NTT)  OCS2023-74 OPE2023-117 |
Short distance transmission designing method based on Gaussian Noise Model that considered optical path characteristics ... [more] | OCS2023-74 OPE2023-117 pp.37-41(OCS), pp.53-57(OPE) |
| LOIS, ICM | 2023-01-19 14:15 |
Fukuoka | Kitakyushu International Conference Center (Primary: On-site, Secondary: Online) |
A Study of Automatic Network Operation based on User's Intents
-- Practice in Operation DX -- Takamichi Nishijima, Atsushi Kitada, Yuta Sugiyama, Satoru Umezaki, Hiroshi Tomonaga (Fujitsu) ICM2022-34 LOIS2022-34 |
In the DX era, to quickly service in is required as business needs change. The current network design and operation reli... [more] | ICM2022-34 LOIS2022-34 pp.19-24 |
| MSS, SS | 2023-01-10 11:00 |
Osaka | (Primary: On-site, Secondary: Online) |
[Panel Discussion]
Review of Mathematical Systems Science and its Applications (MSS) Research Group Activities and Future Prospects
-- Messages from Past MSS Chairs -- Atsuo Ozaki (OIT), Kunihiko Hiraishi (JAIST), Yuichi Nakamura (NEC), Satoshi Yamane (Kanazawa Univ.), Morikazu Nakamura (Univ. of the Ryukyus), Shigemasa Takai (Osaka Univ.) MSS2022-44 SS2022-29 |
Ten years have passed since the Mathematical Systems Science and its Applications (MSS) was established in 2011. To comm... [more] | MSS2022-44 SS2022-29 pp.1-4 |
| MW | 2022-06-09 15:05 |
Nagano | Naganoken Nokyo Building (Primary: On-site, Secondary: Online) |
[Invited Talk]
Activites on utilizing Reconfigurable Intelligent Surface for wireless channel control Masashi Iwabuchi, Riku Ohmiya, Tomoaki Ogawa, Yasushi Takatori (NTT) MW2022-26 |
In this talk, we will introduce our activities for wireless channel control using recinfgurable intelligent surface(RIS)... [more] | MW2022-26 p.19 |
| HWS, VLD [detail] | 2020-03-04 10:30 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
An EVBDD-based Design Verification for Elementary Function Generators Hiroto Fukuhara, Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi (HCU) VLD2019-96 HWS2019-69 |
This paper proposes a design verification based on edge-valued binary decision diagrams (EVBDDs) for elementary functio... [more] |
VLD2019-96 HWS2019-69 pp.13-18 |
| ICTSSL, CAS | 2020-01-30 13:10 |
Tokyo | [Invited Talk]
A Proposal of MOS LSI Analog Sign-Off Verification. Kimihiro Ogawa (Success Inc.) CAS2019-70 ICTSSL2019-39 |
In analog MOS circuit sign-off verification to guarantee design yield, it is well known that analog oriented methodology... [more] | CAS2019-70 ICTSSL2019-39 pp.35-41 |
|
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-08 12:55 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | CPSY2017-45 |
Generally, HDL simulation is used for development and verification of processor design. However, the simulation speed i... [more] |
CPSY2017-45 pp.53-58 |
| IE, CS, IPSJ-AVM, ITE-BCT [detail] | 2016-12-09 13:50 |
Ishikawa | Trial manufacture experiment report of the information terminal bus stop in the community bus "Notty"
-- Citizen support station -- Roma Aburano, Kazuma Kogami, Kazuki Yoshikawa, Yousuke Miyanishi, Mikko Sode Tanaka (KIT) CS2016-60 IE2016-96 |
We have proposed information terminal bus stop. The bus stop has 4 functions which are Timetable and transfer system, ch... [more] | CS2016-60 IE2016-96 pp.97-102 |
|
| KBSE, SS, IPSJ-SE [detail] | 2016-07-13 10:20 |
Hokkaido | A Method to Revise Message Ordering in Sequence Diagram Kozo Okano (Shinshu Univ.), Satoshi Harauchi (Mitsubishi Electric Corp.), Yosuke Tajima, Shinpei Ogata (Shinshu Univ.) SS2016-2 KBSE2016-8 |
For software specification, a lot of methods have been proposed in order to localize defects and to fix defects automat... [more] |
SS2016-2 KBSE2016-8 pp.7-12 |
|
| KBSE | 2016-05-27 10:45 |
Tokyo | Doshisha Univ. Tokyo Branch Office | Model Checking of Source Code Based on Design Pattern Yoshitaka Aoki (NUL) KBSE2016-6 |
We have proposed the " Discovery of Inconsistency of Behavior of System in Source Code between Specification using Model... [more] | KBSE2016-6 pp.31-36 |
| VLD | 2016-03-01 14:45 |
Okinawa | Okinawa Seinen Kaikan | IP Design using High-Level Synthesis Design Flow Masato Tatsuoka, Ken Imanishi, Hidenori Nakaishi, Takeshi Toyoyama (SNI) VLD2015-126 |
In this paper we will describe practical experiences about the use of high level synthesis technologies to achieve highe... [more] | VLD2015-126 pp.87-92 |
| SWIM | 2015-05-23 15:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Critical Issue on Interprise Modeling
-- Business Model Viability Evaluation through Simulation -- Masao J. Matsumoto (ICEIS) SWIM2015-5 |
A Critical Issue on Interprise Modeling ~Business Model Viability Evaluation through Simulation~ Abstract Not all o... [more] |
SWIM2015-5 pp.23-27 |
| RECONF | 2014-06-12 15:00 |
Miyagi | Katahira Sakura Hall | A Study on Accelerating Image Recognition Processing by HW/SW Cooperative Processing on an FPGA for Automatic Watch System on Navigation Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Daichi Uetake, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) RECONF2014-12 |
Accidents on vessel traffic are mainly caused by human error of deficient watching. It is expected to raise the safety o... [more] | RECONF2014-12 pp.61-66 |
| IA, IPSJ-IOT, SITE [detail] | 2014-02-28 13:45 |
Ishikawa | Hotel Rurikoh | Implementation of Direction based Channel Separation Method and Flow Balancing Method for Multi-Channel Wireless Backbone Network Masaki Tagawa (Kyushu Inst. of Tech.), Yuzo Taenaka (Univ. of Tokyo), Kazuya Tsukamoto (Kyushu Inst. of Tech.) SITE2013-72 IA2013-97 |
This study implements an architecture of traffic management on multi-channel wireless backbone network. We propose chann... [more] | SITE2013-72 IA2013-97 pp.165-170 |
| CPSY, VLD, RECONF, IPSJ-SLDM [detail] | 2013-01-17 13:50 |
Kanagawa | The method for automation of design verification using UML diagram Daiki Kano (Tokai Univ.), Naohiko Shimizu (Tokai Univ./IP ARCH, Inc.) VLD2012-131 CPSY2012-80 RECONF2012-85 |
We develop the method for hardware design using UML diagram, in order to develop the hardware efficiently.We propose the... [more] | VLD2012-131 CPSY2012-80 RECONF2012-85 pp.141-146 |
|
| CQ | 2012-07-12 15:35 |
Ehime | Ehime Univ. | [Special Talk]
A consideration on reliability design of telecommunication netwaorks Hitoshi Watanabe (Tokyo University of Science) CQ2012-24 |
The reliability design is important for realizing high reliability under reasonable cost. This report describes the out... [more] | CQ2012-24 pp.41-46 |
| IPSJ-SLDM, VLD | 2012-05-30 15:45 |
Fukuoka | Kitakyushu International Conference Center | High-level Design Debugging Using Potential Dependence Shohei Ono, Takeshi Matsumoto, Masahiro Fujita (Univ. of Tokyo) VLD2012-4 |
As high-level design draws more attention and has been adopted more widely, verification and debugging for high- level d... [more] | VLD2012-4 pp.19-24 |
| SS | 2012-05-10 16:25 |
Ehime | Ehime Univ. | Throughput Performance Verification of Airship Autopilot Software: A Case Study for Evaluating Performance Verification of Software Design Model Akira Kado, Akio Nakata (Hiroshima City Univ.) SS2012-5 |
In the development of embedded systems, it is generally difficult to check, in the design phase, whether or not a design... [more] | SS2012-5 pp.25-30 |
| SWIM | 2011-11-18 10:30 |
Tokyo | Tokai Univ.(Takanawa) | An Integrated Design and Verification Environment from Upstream Design to Model Checking Process
-- Automatic Conversion from UML Descriptions into the Process Definitions and Linear Temporal Logic for SPIN Model Checker -- Naoki Miyamoto, Katsumi Wasaki (Shinshu Univ) SWIM2011-19 |
To execute a SPIN model checker, the targeted model has to be described by the dedicated specification description langu... [more] | SWIM2011-19 pp.7-12 |
| CAS, MSS, VLD, SIP | 2010-06-21 11:40 |
Hokkaido | Kitami Institute of Technology | Layout-Aware Variation Modeling and Its Application to Opamp Design Kouta Shinohara, Mihoko Hidaka, Qing Dong, Jing Li, Shigetoshi Nakatake (Univ. of Kitakyushu) CAS2010-7 VLD2010-17 SIP2010-28 CST2010-7 |
As geometrical scaling of the transistor dimensions, such as feature size and supply voltage, has dominated the semicon... [more] |
CAS2010-7 VLD2010-17 SIP2010-28 CST2010-7 pp.37-41 |
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