Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
EMCJ, IEE-EMC, MW, EST [detail] |
2016-10-21 09:00 |
Miyagi |
Tohoku Univ. |
Attempt for Determining Cryptographic Circuit Blocks Leaking Side-Channel Information Based on Internal Current Source
-- Examination with FPGA Implementation of AES Circuits -- Kengo Iokibe, Naoki Kawata, Yusuke Yano, Hiroto Kagotani, Yoshitaka Toyota (Okayama Univ.) EMCJ2016-74 MW2016-106 EST2016-70 |
For efficient security enhancement of cryptographic ICs against side-channel attacks (SCAs), it is important to identify... [more] |
EMCJ2016-74 MW2016-106 EST2016-70 pp.79-84 |
CCS |
2015-11-09 14:25 |
Kyoto |
Inamori Foundation Memorial Building, Kyoto Univ. |
A macroscopic neural mass model constructed from a current-based network of spiking neurons Hiroaki Umehara (NICT), Masato Okada (UTokyo), Jun-nosuke Teramae (Osaka Univ.), Yasushi Naruse (NICT) CCS2015-51 |
Neural mass model describing the dynamics of mean membrane potentials for neuronal populations are formulated from the n... [more] |
CCS2015-51 pp.35-40 |
SR |
2014-01-24 09:25 |
Miyagi |
Tohoku Univ. |
Base station power control in C-RAN based U/C splitting HetNet Gia Khanh Tran (Tokyo Inst. of Tech.), Kei Sakaguchi (Osaka Univ.), Kiyomichi Araki (Tokyo Inst. of Tech.) SR2013-86 |
The unrelenting user traffic demand triggered by data-centric standards place a premium on area spectral and energy effi... [more] |
SR2013-86 pp.51-56 |
ASN, RCS, NS, SR (Joint) |
2013-07-17 15:45 |
Shizuoka |
Hamamatsu Act City |
Coverage Probability Analysis of Cognitive Heterogeneous Cellular Networks Based on Stochastic Geometry Fereidoun H. Panahi, Tomoaki Ohtsuki (Keio Univ.) RCS2013-84 |
In this report, a Cognitive Radio (CR) based statistical framework for a two-tier heterogeneous cellular network (macro-... [more] |
RCS2013-84 pp.37-42 |
EMCJ, MW, IEE-MAG |
2009-10-23 13:20 |
Iwate |
Iwate Univ. |
Application of IC Macro Model (LECCS) to Bypass Circuit Design for Improving EMI/PI Performance Norimasa Oka, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga (Okayama Univ.) EMCJ2009-68 MW2009-117 |
An IC macro model for power current analysis, called linear equivalent circuit and current source (LECCS) model, is appl... [more] |
EMCJ2009-68 MW2009-117 pp.141-146 |
EMCJ |
2009-09-04 09:05 |
Kyoto |
KEIHANNA PLAZA |
Examination of EMC Macro Model LECCS-I/O with Two Current Sources Simulating Power and Output Currents of CMOS Inverter IC Tomoya Tasaka, Norimasa Oka, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga (Okayama Univ.) EMCJ2009-35 |
In the field of designing printed circuit boards (PCBs), EMC macro-models become increasingly useful
to verify EMI perf... [more] |
EMCJ2009-35 pp.1-6 |
EMCJ |
2009-06-05 14:50 |
Tokyo |
Tokyo Big Sight (Tokyo International Exihibition Center) |
Study for extracting the characteristics of LSI power supply at high frequency including the parasitic coupling between package and chip Tomohiro Kita, Yuichi Mabuchi, Hiroshi Tanaka, Takashi Hisakado, Osami Wada (Kyoto Univ.), Atsushi Nakamura (Renesas Tech.) EMCJ2009-31 |
To establish more efficient EMC designing method of electronic apparatuses, constructing a precise EMC macromodel of IC/... [more] |
EMCJ2009-31 pp.51-56 |
VLD |
2009-03-13 09:15 |
Okinawa |
|
An algorithm for building RTL library Masato Kawai, Hirofumi Kawauchi, Toshio Morikawa, Masaaki Ohtsuki, Masahiro Fukui (Ritsumeikan Univ.) VLD2008-156 |
Recently, due to the appearance of high-performance mobile electrical appliances and rapid growth of the electrical syst... [more] |
VLD2008-156 pp.177-182 |
EMCJ |
2008-07-17 13:40 |
Tokyo |
Kikai-Shinko-Kaikan Bldg |
Evaluation of Multiple Power-Supply Pin LECCS-core Model with Different Pattern Design Boards Ryota Higashi, Kengo Iokibe (Okayama Univ.), Takahiro Tsuda, Kouji Ichikawa, Katsumi Nakamura (DENSO CORP.), Yoshitaka Toyota, Ryuji Koga (Okayama Univ.) EMCJ2008-33 |
We have proposed an EMC macro model, LECCS, to achieve fast simulations of RF power currents in IC/LSIs. The model consi... [more] |
EMCJ2008-33 pp.43-48 |
VLD, ICD |
2008-03-05 13:50 |
Okinawa |
TiRuRu |
An accurate Algorithm for RTL Power Macro-modeling Masaaki Ohtsuki, Masato Kawai, Masahiro Fukui (Ritsumeikan Univ.) VLD2007-139 ICD2007-162 |
Due to the rapid growth of the electric systems, efficient and lowpower designs have been highly required. To satisfy th... [more] |
VLD2007-139 ICD2007-162 pp.13-18 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-16 15:10 |
Kanagawa |
Hiyoshi Campus, Keio University |
Development of verification and power estimation methodology for circuits with Run Time Power Gating Mitsutaka Nakata, Toshiaki Shirai, Toshihiro Kashima, Seidai Takeda, Kimiyoshi Usami (S.I.T.), Naomi Seki, Yohei Hasegawa, Hideharu Amano (Keio Univ.) VLD2007-111 CPSY2007-54 RECONF2007-57 |
When applying Run-Time Power Gating (RTPG) to a design,logic verification is one of the major problems.Gate-level simula... [more] |
VLD2007-111 CPSY2007-54 RECONF2007-57 pp.37-42 |
RECONF, CPSY, VLD, IPSJ-SLDM |
2008-01-16 16:00 |
Kanagawa |
Hiyoshi Campus, Keio University |
An efficient algorithm for RTL power macro modeling and library building Masaaki Ohtsuki, Masato Kawai, Tatsuya Koyagi, Masahiro Fukui (Ritsumeikan Univ.) |
Due to the rapid growth of the electric systems, efficient and lowpower designs have been highly required. To satisfy th... [more] |
VLD2007-113 CPSY2007-56 RECONF2007-59 pp.49-54 |
EMCJ, EMD |
2007-07-27 11:10 |
Tokyo |
Kikai-Shinko-Kaikan Bldg |
Investigation of Parasitic Capacitance to Improve EMC Macro Model LECCS around 1GHz Atsuhiro Takahashi, Kengo Iokibe (Okayama Univ.), Umberto Paoletti, Osami Wada (Kyoto Univ.), Yoshitaka Toyota, Ryuji Koga (Okayama Univ.) EMCJ2007-33 EMD2007-19 |
High frequency currents flowing in power supply networks of an IC/LSI has been estimated by an EMC macro model.
The hig... [more] |
EMCJ2007-33 EMD2007-19 pp.5-10 |
VLD, IPSJ-SLDM |
2007-05-11 13:20 |
Kyoto |
Kyodai Kaikan |
A Flexible Power and Task Modeling for LSI Blocks Tatsuya Koyagi, Masahiro Fukui (Ritsumeikan Univ.), Resve Saleh (Univ. of British Columbia) |
Due to the rapid popularization of portable equipments, it becomes very important to make the battery lifetime longer wi... [more] |
VLD2007-13 pp.37-42 |
EMCJ |
2006-07-27 10:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Determination of impedances in LECCS-I/O model by 3-port VNA measurement for higher frequency range Akihiro Osaki, Kengo Iokibe, Yoshitaka Toyota, Ryuji Koga (Okayama Univ.), Osami Wada (Kyoto Univ.) EMCJ2006-21 |
This report discusses impedance determination of a linear equivalent circuit (LEC) in an EMC macro model, LECCS I/O. The... [more] |
EMCJ2006-21 pp.17-22 |
ICD, CPM |
2005-09-08 09:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Development of Design Techniques for Semiconductor-Package By using Simplified DRAM Macro Model of Power System Satoshi Nakamura, Takashi Suga (Hitachi PERL), Mitsuaki Katagiri, Yoji Nishio, Seiji Funaba, Yukitoshi Hirose, イサ サトシ (Elpida) |
In late years, MCP(Multi Chip Package) and SiP(System in Package) which has plural semiconductor chips in one package be... [more] |
CPM2005-87 ICD2005-97 pp.13-18 |
EMCJ |
2005-03-10 16:40 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
Construction of LECCS-core Model for Multiple Power-supply LSI by S-parameter Measurement Yuichiro Minamisawa, Arinobu Ohta, Tomohiro Toyota, Katsumi Nakamura, Osami Wada, Yoshitaka Toyota, Ryuji Koga (Okayama Univ.), Yoshiyuki Saito (Matsushita Electric Industrial), Atsushi Nakamura (Renesas Technology) |
The authors proposed a multiple-port LECCS-core model as a macro model for EMC simulation of a multiple power-supply pin... [more] |
EMCJ2004-161 pp.85-90 |
EMCJ |
2004-12-10 15:40 |
Aichi |
Nagoya Institute of Technology |
A proposal of a parameter optimization algorithm for LECSS: EMC macro-modeling of IC/LSI power current Yohei Nomura, Jun Kawashima, Nobuo Funabiki, Toyohiro Toyota, Yuichirou Minamisawa, Osami Wada (Okayama Univ.) |
In this paper, we propose a parameter optimization algorithm for the EMC macro-modeling of IC/LSI power currents called ... [more] |
EMCJ2004-114 pp.71-76 |